參數(shù)資料
型號(hào): XC5VTX240T-1FFG1759C
廠商: Xilinx Inc
文件頁(yè)數(shù): 51/91頁(yè)
文件大?。?/td> 0K
描述: IC FPGA VIRTEX5TXT 240K 1759FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 TXT
LAB/CLB數(shù): 18720
邏輯元件/單元數(shù): 239616
RAM 位總計(jì): 11943936
輸入/輸出數(shù): 680
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1759-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1759-FCBGA
配用: 568-5088-ND - BOARD DEMO DAC1408D750
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
55
PLL Switching Characteristics
Table 74: PLL Specification
Symbol
Description
Speed Grade
Units
-3
-2
-1
FINMAX
Maximum Input Clock Frequency
710
645
MHz
FINMIN
Minimum Input Clock Frequency
19
MHz
FINJITTER
Maximum Input Clock Period Jitter
<20% of clock input period or 1 ns Max
FINDUTY
Allowable Input Duty Cycle: 19—49 MHz
25/75
%
Allowable Input Duty Cycle: 50—199 MHz
30/70
%
Allowable Input Duty Cycle: 200—399 MHz
35/65
%
Allowable Input Duty Cycle: 400—499 MHz
40/60
%
Allowable Input Duty Cycle: >500 MHz
45/55
%
FVCOMIN
Minimum PLL VCO Frequency
400
MHz
FVCOMAX
Maximum PLL VCO Frequency
1440
1200
1000
MHz
FBANDWIDTH
Low PLL Bandwidth at Typical(1)
11
1
MHz
High PLL Bandwidth at Typical(1)
44
4
MHz
TSTAPHAOFFSET
Static Phase Offset of the PLL Outputs
120
ps
TOUTJITTER
PLL Output Jitter(2)
Note 1
TOUTDUTY
PLL Output Clock Duty Cycle Precision(3)
±150
±200
ps
TLOCKMAX
PLL Maximum Lock Time(4)
100
s
FOUTMAX
PLL Maximum Output Frequency for LX20T devices
N/A
667
600
MHz
PLL Maximum Output Frequency for LX30, LX30T, LX50,
LX50T, LX85, LX85T, LX110, LX110T, SX35T, SX50T, FX30T,
and FX70Tdevices
710
667
600
MHz
PLL Maximum Output Frequency for LX155, LX155T, and
FX100T devices
650
600
550
MHz
PLL Maximum Output Frequency for FX130T devices
550
500
450
MHz
PLL Maximum Output Frequency for LX220, LX220T, LX330,
LX330T, SX95T, SX240T, TX150T, TX240T, and FX200T
devices
N/A
500
450
MHz
FOUTMIN
PLL Minimum Output Frequency(5)
3.125
MHz
TEXTFDVAR
External Clock Feedback Variation
< 20% of clock input period or 1 ns Max
RSTMINPULSE
Minimum Reset Pulse Width
5
ns
FPFDMAX
Maximum Frequency at the Phase Frequency Detector
550
500
450
MHz
FPFDMIN
Minimum Frequency at the Phase Frequency Detector
19
MHz
TFBDELAY
Maximum External Delay in the Feedback Path
3 ns Max or one CLKIN cycle
Notes:
1.
The PLL does not filter typical spread spectrum input clocks because they are usually far below the bandwidth filter frequencies.
2.
Values for this parameter are available in the Architecture Wizard.
3.
Includes global clock buffer.
4.
The LOCK signal must be sampled after TLOCKMAX. The LOCK signal is invalid after configuration or reset until the TLOCKMAX time has
expired.
5.
Calculated as FVCO/128 assuming output duty cycle is 50%.
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XC5VTX240T-1FFG1759CES 功能描述:IC FPGA VIRTEX5TX 240K 1759FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 TXT 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計(jì):16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA(31x31) 其它名稱:122-1789
XC5VTX240T-1FFG1759I 功能描述:IC FPGA VIRTEX5TXT 240K 1759FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 TXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC5VTX240T-2FF1759C 功能描述:IC FPGA VIRTEX5TXT 240K 1759FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 TXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC5VTX240T-2FF1759CES 功能描述:IC FPGA VIRTEX5TX 240K 1759FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 TXT 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計(jì):16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA(31x31) 其它名稱:122-1789
XC5VTX240T-2FF1759I 功能描述:IC FPGA VIRTEX5TXT 240K 1759FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 TXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)