參數(shù)資料
型號: XC5VLX85-3FF1153C
廠商: Xilinx Inc
文件頁數(shù): 85/91頁
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-5 85K 1153FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 6480
邏輯元件/單元數(shù): 82944
RAM 位總計: 3538944
輸入/輸出數(shù): 560
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1153-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1153-FCBGA(35x35)
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-AFX-FF1153-500-G-ND - BOARD DEV VIRTEX 5 FF1153
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
86
09/06/06
2.0
Added new sections for LXT devices and added LXT devices to the appropriate tables. The addition of
the GTP_DUAL Tile Specifications required the tables to be renumbered.
Changed maximum VIN values in Table 1 and Table 2.
Updated values and added Tj = 85°C to Table 4, page 3.
Revised the cascade block RAM Memory, page 28 section in Table 52 to 64K with new I/O delays.
Revised the setup and hold times in Table 60, page 40.
Added FMAX_CASCADE to Table 68, page 47.
Revised FFXLFMSMAX and FCLKINLFFXMSMAX in Table 76, page 57.
10/13/06
2.1
Added System Monitor parameters. Added XC5VLX85T to appropriate tables.
Revised Table 28 including notes. Added Table 29, and Figure 3 and Figure 4.
Added Table 48, page 25: RocketIO CRC block.
Revised design software version and Table 54 on page 30.
Updated FMAX_ECC in Table 68, page 47.
Changed hold times for TSMDCCK/ TSMCCKD and TBPIDCC/TBPICCD in Table 70, page 51.
Revised TFBDELAY, FOUTMIN, FOUTMAX, and FINJITTER Table 74, page 55.
01/05/07
2.2
Added IIN to Table 2. Added XC5VLX220T to appropriate tables.
Added LVDCI33, LVDCI25, LVDCI18, LVDCI15 to Table 7.
Update the symbols in the GTP Transceiver Table 24, Table 25, and Table 26.
Add values for -1 speed grade in Table 30, page 16.
Added SFI-4.1 values to Table 53, page 29.
Removed -3 speed grade from available LX220 device list in Table 54, page 30.
Added maximum frequency to Table 72 and Table 73, page 54.
In Table 76, page 57 changed the all the CLKDV, CLKFX, and CLKFX180 Min values and the CLKIN
Min values in the Input Clocks (High Frequency Mode) section.
Added values to Table 79 and Table80, page60.
Date
Version
Revision
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