參數(shù)資料
型號(hào): XC5VLX330-2FF1760C
廠商: Xilinx Inc
文件頁數(shù): 88/91頁
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-5 330K 1760FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 25920
邏輯元件/單元數(shù): 331776
RAM 位總計(jì): 10616832
輸入/輸出數(shù): 1200
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1760-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1760-FCBGA
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-V5-ML525-UNI-G-ND - EVAL PLATFORM ROCKET IO VIRTEX-5
HW-AFX-FF1760-500-G-ND - BOARD DEV VIRTEX 5 FF1760
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
89
06/26/07
3.3
Added conditions to DVPPIN in Table 28, page 14.
Changed the FGTXMAX symbol name to FGTPMAX.
Updated GTP maximum line rates to 3.75 Gb/s in Table 30, page 16.
Updated maximum frequencies in Table33, page17.
Added 3.75 Gb/s condition and changed maximum value of FGTX in Table 34, page 17.
Added 3.75 Gb/s sinusoidal jitter specification and changed maximum value of FGRX in Table 35,
Changed analog input common mode ranges in Table 51, page 26.
Changed TPKGSKEW values in Table99, page84.
07/26/07
3.4
Added maximum value of IREF to Table 3, page 2.
Revised Table 54 and changed the design software version in Table 55 for production devices.
In Table 64, page 44, added High Performance Mode to Note 2.
In Table 70, page 51, revised description of TSMDCCK/TSMCCKD.
Added Note 4 to TDUTYCYCRANGE_200_400 frequency range in Table 78, page 59.
09/27/07
3.5
Added IBATT value and Note 2 to Table 3.
Added DRP Clock Frequency and Note 4 to Table 51. Revised the typical and maximum values and
units for gain error and bipolar gain error.
Removed unsupported XC5VSX95T -3 speed grade from Table 54 and Table 55.
Removed unsupported I/O standards (LVDS_33, LVDSEXT_33, and ULVDS_25) from Table 51. Also
updated LVDSEXT, 2.5V in Table 59.
11/05/07
3.6
Removed note 1 from Table 52, page 28. FMAX of clock is not an applicable limitation.
Revised DDR2 memory interface performance in Table53, page29.
Revised Table 55 to add ISE 9.2i SP3 where applicable.
Removed XC5VSX95T -3 speed grade support from applicable tables.
Removed unsupported I/O standard (LVPECL_33) from Table 58 and added LVPECL_25.
Added TSMCO and TSMCKBY to Table 70, page 51.
Revised note 3 in Table 76, page 57 and Table77, page58.
Clarified notes in Table 87 to Table 90, and Table 94 to Table 97.
Revised note 1 in Table 99.
12/11/07
3.7
Added new devices (XC5VLX20T, XC5VLX155, and XC5VLX155T) throughout document.
Removed -3 speed grade from XC5VSX95T device lists.
revised Note 1 on Table 92 through Table 97.
Revised Note 1 on Table 99.
02/05/08
3.8
Updated date on version 3.7. Other minor typographical edits.
Updated the sentence: Xilinx does not specify the current or I/O behavior for other power-on sequences,
Added values and notes to Table 27, page 14. Removed ICCINTQ since it is included in Table 4, page 3.
Combined IVTTRXCQ into IVTTRXQ values.
Revised TLLSKEW values in Table 34, page 17.
Revised RXPPMTOL values and note 1 in Table 35, page 18.
Revised -2 performance value for SPI-4.2 in Table 53, page 29.
Added TIODDO_T, TIODDO_IDATAIN, TIODDO_ODATAIN, and Note 3 to Table 64, page 44.
Split out the FMAX rows in Table 71 and the FOUTMAX rows in Table 74, revised -2 value for smallest
devices in both tables.
Updated Table 4 and Table 84 to Table 98 to match speed grade designations listed in Table 54.
Revised Note 1 on Table 96 and Table 97.
Date
Version
Revision
相關(guān)PDF資料
PDF描述
IDT71V016SA20YGI IC SRAM 1MBIT 20NS 44SOJ
IDT71V016SA15YGI IC SRAM 1MBIT 15NS 44SOJ
IDT71V016SA12YGI IC SRAM 1MBIT 12NS 44SOJ
IDT71V3577S80PFG8 IC SRAM 4MBIT 80NS 100TQFP
AMM31DTKN-S288 CONN EDGECARD 62POS .156 EXTEND
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC5VLX330-2FF1760CES 制造商:Xilinx 功能描述:
XC5VLX330-2FFG1760C 功能描述:IC FPGA VIRTEX-5 330K 1760FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 LX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC5VLX330T 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-5 Family Overview
XC5VLX330T-1FF1738C 功能描述:IC FPGA VIRTEX-5 330K 1738FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 LXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC5VLX330T-1FF1738I 功能描述:IC FPGA VIRTEX-5 330K 1738FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Virtex®-5 LXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)