參數(shù)資料
型號(hào)： XC2VP4
廠商： Xilinx, Inc.
英文描述： Platform Flash In-System Programmable Configuration PROMS
中文描述： 平臺(tái)Flash在系統(tǒng)可編程配置方案管理系統(tǒng)
文件頁(yè)數(shù)： 1/46頁(yè)
文件大?。?/td> 525K
代理商： XC2VP4
DS123 (v2.9) May 09, 2006
www.xilinx.com
1
2003-2006 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm
.
PowerPC is a trademark of IBM, Inc. All other trademarks are the property of their respective owners. All specifications are subject to change without notice.
Features
In-System Programmable PROMs for Configuration of
Xilinx FPGAs
Low-Power Advanced CMOS NOR FLASH Process
Endurance of 20,000 Program/Erase Cycles
Operation over Full Industrial Temperature Range
(–40°C to +85°C)
IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)
Support for Programming, Prototyping, and Testing
JTAG Command Initiation of Standard FPGA
Configuration
Cascadable for Storing Longer or Multiple Bitstreams
Dedicated Boundary-Scan (JTAG) I/O Power Supply
(V
CCJ
)
I/O Pins Compatible with Voltage Levels Ranging From
1.5V to 3.3V
Design Support Using the Xilinx Alliance ISE and
Foundation ISE Series Software Packages
XCF01S/XCF02S/XCF04S
3.3V supply voltage
Serial FPGA configuration interface (up to 33 MHz)
Available in small-footprint VO20 and VOG20
packages.
XCF08P/XCF16P/XCF32P
1.8V supply voltage
Serial or parallel FPGA configuration interface
(up to 33 MHz)
Available in small-footprint VO48, VOG48, FS48,
and FSG48 packages
Design revision technology enables storing and
accessing multiple design revisions for
configuration
Built-in data decompressor compatible with Xilinx
advanced compression technology
Description
Xilinx introduces the Platform Flash series of in-system
programmable configuration PROMs. Available in 1 to 32
Megabit (Mbit) densities, these PROMs provide an
easy-to-use, cost-effective, and reprogrammable method
for storing large Xilinx FPGA configuration bitstreams. The
Platform Flash PROM series includes both the 3.3V
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that
support Master Serial and Slave Serial FPGA configuration
modes (
Figure 1, page 2
). The XCFxxP version includes
32-Mbit, 16-Mbit, and 8-Mbit PROMs that support Master
Serial, Slave Serial, Master SelectMAP, and Slave
SelectMAP FPGA configuration modes (
Figure 2, page 2
).
A summary of the Platform Flash PROM family members
and supported features is shown in
Table 1
.
<BL Blue>
Platform Flash In-System
Programmable Configuration
PROMS
DS123 (v2.9) May 09, 2006
0
Product Specification
R
Table 1:
Platform Flash PROM Features
Device
Density
V
CCINT
V
CCO
Range
V
CCJ
Range
Packages
Program
In-system
via JTAG
Serial
Config.
Parallel
Config.
Design
Revisioning
Compression
XCF01S
1 Mbit
3.3V
1.8V – 3.3V 2.5V – 3.3V
VO20/VOG20
XCF02S
2 Mbit
3.3V
1.8V – 3.3V 2.5V – 3.3V
VO20/VOG20
XCF04S
4 Mbit
3.3V
1.8V – 3.3V 2.5V – 3.3V
VO20/VOG20
XCF08P
8 Mbit
1.8V
1.5V – 3.3V 2.5V – 3.3V
VO48/VOG48
FS48/FSG48
XCF16P
16 Mbit
1.8V
1.5V – 3.3V 2.5V – 3.3V
VO48/VOG48
FS48/FSG48
XCF32P
32 Mbit
1.8V
1.5V – 3.3V 2.5V – 3.3V
VO48/VOG48
FS48/FSG48
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