參數(shù)資料
型號: XC2S50E-6FTG256C
廠商: Xilinx Inc
文件頁數(shù): 101/108頁
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 50K 256FTBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標準包裝: 90
系列: Spartan®-IIE
LAB/CLB數(shù): 384
邏輯元件/單元數(shù): 1728
RAM 位總計: 32768
輸入/輸出數(shù): 182
門數(shù): 50000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FTBGA
其它名稱: 122-1328
92
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O, VREF Bank 6,
L176N
6
P9
XC2S600E
All
I/O, VREF Bank 6,
L176N
I/O, VREF Bank 6,
L176N_Y
I/O, L175P
6
R1
XC2S400E
-
I/O, L175P_Y
I/O, L175P
I/O, L175N
6
R2
XC2S400E
-
I/O, L175N_Y
I/O, L175N
I/O
6
R4
-
I/O
I/O, L174P_YY
6
R5
All
-
I/O, L174P_YY
I/O, L174N_YY
6
R6
All
-
I/O, L174N_YY
I/O
6
R7
-
I/O
I/O, L173P_YY
6
R8
All
-
I/O, L173P_YY
I/O, VREF Bank 6,
L173N_YY
6
R9
All
I/O, VREF Bank 6,
L173N_YY
I/O, VREF Bank 6,
L173N_YY
I/O, L172P
6
T1
XC2S600E
-
I/O, L172P
I/O, L172P_Y
I/O, L172N
6
T2
XC2S600E
-
I/O, L172N
I/O, L172N_Y
I/O
6
T3
-
I/O
I/O, L171P
6
T5
XC2S600E
-
I/O, L171P
I/O, L171P_Y
I/O, L171N
6
T6
XC2S600E
-
I/O, L171N
I/O, L171N_Y
I/O
6
U1
-
I/O
I/O, L170P
6
T7
XC2S600E
-
I/O, L170P
I/O, L170P_Y
I/O, L170N
6
T8
XC2S600E
-
I/O, L170N
I/O, L170N_Y
I/O, L169P
6
U2
XC2S400E
-
I/O, L169P_Y
I/O, L169P
I/O, L169N
6
U3
XC2S400E
-
I/O, L169N_Y
I/O, L169N
I/O
6
U7
-
I/O
I/O, L168P
6
U4
XC2S600E
-
I/O, L168P_Y
I/O, L168N
6
U5
XC2S600E
-
I/O
I/O, L168N_Y
I/O
6
U8
-
I/O
I/O, L167P_YY
6
V1
All
-
I/O, L167P_YY
I/O, L167N_YY
6
V2
All
-
I/O, L167N_YY
I/O
6
V3
-
I/O
I/O, VREF Bank 6,
L166P_YY
6
V4
All
I/O, VREF Bank 6,
L166P_YY
I/O, VREF Bank 6,
L166P_YY
I/O, L166N_YY
6
V5
All
-
I/O, L166N_YY
I/O, L165P_YY
6
V6
All
-
I/O, L165P_YY
I/O, L165N_YY
6
V7
All
-
I/O, L165N_YY
I/O
6
V8
-
I/O
I/O, L164P
6
W1
XC2S600E
-
I/O, L164P
I/O, L164P_Y
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Pin
LVDS Async.
Output Option
VREF
Option
Device-Specific Pinouts
Function
Bank
XC2S400E
XC2S600E
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