參數(shù)資料
型號(hào)： XC2S150-5FG456I
廠商： Xilinx Inc
文件頁(yè)數(shù)： 67/99頁(yè)
文件大?。?/td> 0K
描述： IC FPGA 2.5V I-TEMP 456-FBGA
標(biāo)準(zhǔn)包裝： 60
系列： Spartan®-II
LAB/CLB數(shù)： 864
邏輯元件/單元數(shù)： 3888
RAM 位總計(jì)： 49152
輸入/輸出數(shù)： 260
門數(shù)： 150000
電源電壓： 2.375 V ~ 2.625 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 456-BBGA
供應(yīng)商設(shè)備封裝： 456-FBGA
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
7
2000-2008 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
trademarks are the property of their respective owners.
Architectural Description
Spartan-II FPGA Array
The Spartan-II field-programmable gate array, shown in
Figure 2, is composed of five major configurable elements:
IOBs provide the interface between the package pins
and the internal logic
CLBs provide the functional elements for constructing
most logic
Dedicated block RAM memories of 4096 bits each
Clock DLLs for clock-distribution delay compensation
and clock domain control
Versatile multi-level interconnect structure
As can be seen in Figure 2, the CLBs form the central logic
structure with easy access to all support and routing
structures. The IOBs are located around all the logic and
memory elements for easy and quick routing of signals on
and off the chip.
Values stored in static memory cells control all the
configurable logic elements and interconnect resources.
These values load into the memory cells on power-up, and
can reload if necessary to change the function of the device.
Each of these elements will be discussed in detail in the
following sections.
Input/Output Block
The Spartan-II FPGA IOB, as seen in Figure 2, features
inputs and outputs that support a wide variety of I/O
signaling standards. These high-speed inputs and outputs
are capable of supporting various state of the art memory
and bus interfaces. Table 3 lists several of the standards
which are supported along with the required reference,
output and termination voltages needed to meet the
standard.
50
Spartan-II FPGA Family:
Functional Description
DS001-2 (v2.8) June 13, 2008
Product Specification
R
Figure 2: Spartan-II FPGA Input/Output Block (IOB)
Package Pin
Package
Pin
Package Pin
D
CK
EC
SR
Q
D
CK
EC
SR
Q
D
CK
EC
SR
Q
Programmable
Bias &
ESD Network
VCCO
I/O
I/O, VREF
Internal
Reference
To Next I/O
To Other
External VREF Inputs
of Bank
Programmable
Input Buffer
Programmable
Output Buffer
Programmable
Delay
VCC
OE
SR
O
OCE
I
ICE
IQ
CLK
TCE
T
DS001_02_090600
TFF
OFF
IFF
相關(guān)PDF資料
PDF描述
XC3S500E-4FG320I IC FPGA SPARTAN 3E 320FBGA
25LC040AT-I/MNY IC EEPROM SER 4K 512X8 8TDFN
5552568-1 CONN CHAMP JACKSCREW KIT 4-40
25AA040AT-I/MNY IC EEPROM SER 4K 512X8 8TDFN
XC3S500E-5FGG320C IC FPGA SPARTAN-3E 500K 320-FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC2S150-5FGG256C 功能描述:IC SPARTAN-II FPGA 150K 256-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan®-II 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27）
XC2S150-5FGG256I 制造商:Xilinx 功能描述:FPGA SPARTAN-II 150K GATES 3888 CELLS 263MHZ 2.5V 256FBGA - Trays
XC2S150-5FGG456C 功能描述:IC SPARTAN-II FPGA 150K 456-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan®-II 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27）
XC2S150-5FGG456I 制造商:Xilinx 功能描述:FPGA SPARTAN-II 150K GATES 3888 CELLS 263MHZ 2.5V 456FBGA - Trays
XC2S1505PQ208C 制造商:XILINX 功能描述:IC 制造商:XILINX 功能描述:*
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*