參數(shù)資料
型號: X9C503
元件分類: 數(shù)字電位計
英文描述: EEPOT Nonvolatile Digital Potentiometer(100個抽頭,-5V~+5V,50K總電阻,非易失性數(shù)字電位器)
中文描述: EEPOT非易失數(shù)字電位器(100個抽頭,- 5V的?5V的,50K的總電阻,非易失性數(shù)字電位器)
文件頁數(shù): 8/8頁
文件大?。?/td> 87K
代理商: X9C503
Xicor Application Note
AN120-8
AN120
On each measurement cycle, A1’s lower input pair
samples the bridge output. Depending on the result of the
comparison, they tend to drive the pin 4 output bit to 0 or
1, as the bridge reports an RTD-setpoint differential that’s
negative or positive. Thus, the solid-state relay (SSR) and
heater will most likely turn on when the temperature is low
and off when it’s high.
To make the resulting on/off heater drive have an average
duty-factor that’s nicely proportional to the magnitude of
the temperature error signal and not just a simple “bang-
bang” relationship, the bridge output voltage is summed
with a triangular dither signal produced by P2. The
combination of P2 and U2 causes P2 to output one full
triangular dither waveform every 128 measurement
cycles.
Thermal inertia of the hearer and the thermal load
averages over the heater cycle rate (1 Hz in this example).
Consequently, suitable selection of the R6-C1 oscillator
RC will avoid significant temperature ripple. R2 adjusts the
amplitude of the P2 dither signal and thereby sets the
effective controller P-term gain that relates heater duty
factor to temperature error to get adequate control loop
“stiffness” without oscillation.
Meanwhile, error integrator A2 + P1 also samples the
temperature difference signal. The integration sampling
frequency, and therefore the integrator time constant, is
set by the choice of which U2 output bit is connected to
P1’s clock. This arrangement causes the integrator to take
one step in the direction of zero setpoint error every 1, 2,
4, 8, 16, 32, 64, or 128 heater dither cycles. As a result, it
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