參數資料
型號: X9C303S8
廠商: INTERSIL CORP
元件分類: 數字電位計
英文描述: Digitally Controlled Potentiomet (XDCP)
中文描述: 32K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8
封裝: 0.150 INCH, PLASTIC, SOIC-8
文件頁數: 1/10頁
文件大小: 366K
代理商: X9C303S8
REV 1.1 4/27/01
Characteristics subject to change without notice.
1 of 10
www.xicor.com
XDCP
is a trademark of Xicor, Inc.
FEATURES
Solid-state potentiometer
Three-wire serial interface
100 wiper tap points
—Wiper position stored in nonvolatile memory
and recalled on power-up
99 resistive elements, log taper
—Temperature compensated
—End to end resistance, ±15%
—Terminal voltages, ±5V
Low power CMOS
—V
CC
= 5V
—Active current, 3mA max.
—Standby current, 750μA max.
High reliability
—Endurance, 100,000 data changes per bit
—Register data retention, 100 years
X9C303, 32 k
Packages
—8-lead TSSOP
—8-lead SOIC
—8-pin DIP
DESCRIPTION
The Xicor X9C303 is a digitally controlled potentiome-
ter (XDCP). The device consists of a resistor array,
wiper switches, a control section, and nonvolatile
memory. The wiper position is controlled by a three-
wire interface.
The resistor array is composed of 99 resistive ele-
ments. Between each element and at either end are
tap points accessible to the wiper terminal. The posi-
tion of the wiper element is controlled by the CS, U/D,
and INC inputs. The position of the wiper can be
stored in nonvolatile memory and then be recalled
upon a subsequent power-up operation.
The device can be used as a three-terminal potentio-
meter or as a two-terminal variable resistor in a wide
variety of applications ranging from control, to signal
processing, to parameter adjustment. Digitally-
controlled potentiometers provide three powerful appli-
cation advantages; (1) the variability and reliability of a
solid-state potentiometer, (2) the flexibility of com-
puter-based digital controls, and (3) the use of nonvol-
atile memory for potentiometer settings retention.
X9C303
Digitally Controlled Potentiometer (XDCP
)
A
PPLICATION
N
OTE
A V A I L A B L E
AN42 AN44–48 AN50 AN52 AN53 AN71 AN92
Terminal Voltage ±5V, 100 Taps, Log Taper
BLOCK DIAGRAM
7-Bit
Up/Down
Counter
7-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
One
of
One-
Hundred
Decoder
Resistor
Array
R
L/
V
L
R
W/
V
W
R
H/
V
H
U/D
INC
CS
Transfer
Gates
V
CC
V
SS
99
98
97
96
2
1
0
相關PDF資料
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相關代理商/技術參數
參數描述
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