參數(shù)資料
型號: X9C104
元件分類: 數(shù)字電位計
英文描述: EEPOT Nonvolatile Digital Potentiometer(100個抽頭,-5V~+5V,100K總電阻,非易失性數(shù)字電位器)
中文描述: EEPOT非易失數(shù)字電位器(100個抽頭,- 5V的?5V的,100K的總電阻,非易失性數(shù)字電位器)
文件頁數(shù): 1/11頁
文件大?。?/td> 257K
代理商: X9C104
1
FN8222.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9C102, X9C103, X9C104, X9C503
Digitally Controlled Potentiometer
(XDCP)
FEATURES
Solid-state potentiometer
3-wire serial interface
100 wiper tap points
—Wiper position stored in nonvolatile memory
and recalled on power-up
99 resistive elements
—Temperature compensated
—End to end resistance, ±20%
—Terminal voltages, ±5V
Low power CMOS
—V
CC
= 5V
—Active current, 3mA max.
—Standby current, 750μA max.
High reliability
—Endurance, 100,000 data changes per bit
—Register data retention, 100 years
X9C102 = 1k
X9C103 = 10k
X9C503 = 50k
X9C104 = 100k
Packages
—8-lead SOIC and DIP
Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X9Cxxx are Intersil digitally controlled (XDCP)
potentiometers. The device consists of a resistor
array, wiper switches, a control section, and nonvola-
tile memory. The wiper position is controlled by a
three-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switch-
ing network. Between each element and at either end
are tap points accessible to the wiper terminal. The
position of the wiper element is controlled by the CS,
U/D, and INC inputs. The position of the wiper can be
stored in nonvolatile memory and then be recalled
upon a subsequent power-up operation.
The device can be used as a three-terminal potentiom-
eter or as a two-terminal variable resistor in a wide
variety of applications including:
– control
– parameter adjustments
– signal processing
BLOCK DIAGRAM
Up/Down
(U/D)
(INC)
Increment
Device
Select
(CS)
V
CC
(Supply Voltage)
V
SS
(Ground)
7-Bit
Up/Down
Counter
7-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
One
of
One-
Hundred
Decoder
Resistor
Array
U/D
INC
CS
Transfer
Gates
V
CC
GND
99
98
97
96
2
1
0
Control
and
Memory
General
Detailed
R
L
/V
L
R
W
/V
W
R
H
/V
H
V
H
/R
H
R
W
/V
W
V
L
/R
L
Data Sheet
September 19, 2005
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