參數(shù)資料
型號: X96011V14IZ
廠商: INTERSIL CORP
元件分類: 溫度/濕度傳感器
英文描述: Temperature Sensor with Look Up Table Memory and DAC
中文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, PLASTIC, TSSOP-14
文件頁數(shù): 12/23頁
文件大?。?/td> 335K
代理商: X96011V14IZ
12
FN8215.1
October 25, 2005
Control Register 1
This register is accessed by performing a Read or Write
operation to address 81h of memory. This byte’s volatility
is determined by bit NV13 in Control register 0.
LDA5 - LDA0: LUT D
IRECT
A
CCESS
B
ITS
When bit LDAS (bit 4 in Control register 5) is set to “1”,
the LUT is addressed by these six bits, and it is not
addressed by the output of the on-chip A/D converter.
When bit LDAS is set to “0”, these six bits are ignored
by the X96011. See Figure 7.
A value between 00h (00
10
) and 3Fh (63
10
) may be writ-
ten to these register bits, to select the corresponding row
in the LUT. The written value is added to the base
address of the LUT (90h).
Control Register 3
This register is accessed by performing a Read or Write
operation to address 83h of memory. This byte’s volatility
is determined by bit NV13 in Control register 0.
DDA7 - DDA0: D/A D
IRECT
A
CCESS
B
ITS
When bit DDAS (bit 5 in Control register 5) is set to “1”,
the input to the D/A converter is the content of bits
DDA7 - DDA0, and it is not a row of LUT. When bit
DDAS is set to “0” (default) these eight bits are ignored
by the X96011. See Figure 6.
Control Register 5
This register is accessed by performing a Read or
Write operation to address 85h of memory.
IFSO1 - IFSO0: C
URRENT
G
ENERATOR
F
ULL
S
CALE
O
UTPUT
S
ET
B
ITS
(N
ON
-
VOLATILE
)
These two bits are used to set the full scale output cur-
rent at the Current Generator pin, Iout, according to
the following table. The direction of this current is set
by bit IDS in Control register 0. See Figure 5.
LDAS: LUT D
IRECT
A
CCESS
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
When bit LDAS is set to “0” (default), the LUT is
addressed by the output of the on-chip A/D converter.
When bit LDAS is set to “1”, LUT is addressed by bits
LDA5 - LDA0.
DDAS: D/A D
IRECT
A
CCESS
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
When bit DDAS is set to “0” (default), the input to
the D/A converter is a row of the LUT. When bit
DDAS is set to “1”, that input is the content of the
Control register 3.
Control Register 6
This register is accessed by performing a Read or
Write operation to address 86h of memory.
I1FSO1
0
0
1
1
I1FSO0
0
1
0
1
I1 Full Scale Output Current
Reserved (Don’t Use)
±
0.4mA
±
0.85 mA
±
1.3 mA (Default)
X96011
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