參數(shù)資料
型號: X9430WS24M2.7
英文描述: Interface IC
中文描述: 接口IC
文件頁數(shù): 12/21頁
文件大?。?/td> 881K
代理商: X9430WS24M2.7
X9430
– Preliminary Information
Characteristics subject to change without notice.
12 of 21
REV 1.0 6/20/00
www.xicor.com
POTENTIOMETER D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
Symbol
I
CC1
Parameter
Limits
Typ.
Test Conditions
f
SCK
= 2MHz, SO = Open,
Other Inputs = V
SS
f
SCK
= 2MHz, SO = Open,
Other Inputs = V
SS
SCK = SI = V
SS
, Addr. = V
SS
V
IN
= V
SS
to V
CC
V
OUT
= V
SS
to V
CC
Min.
Max.
400
Unit
μA
V
CC
supply current (active)
I
CC2
V
CC
supply current (nonvolatile
write)
V
CC
current (standby)
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
1
mA
I
SB
I
LI
I
LO
V
IH
V
IL
V
OL
1
μA
μA
μA
V
V
V
10
10
V
CC
x 0.7
–0.5
V
CC
+ 0.5
V
CC
x 0.1
0.4
I
OL
= 3mA
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Unit
Data changes per register
years
Symbol
C
OUT
(5)
C
IN
(5)
C
L
| C
H
| C
W
Test
Typ.
Max.
8
6
Unit
pF
pF
pF
Test Conditions
V
OUT
= 0V
V
IN
= 0V
Output capacitance (SO)
Input capacitance (A0, A1, SI, WP, HOLD and SCK)
Potentiometer capacitance
10/10/
Symbol
t
PUR
(6)
t
PUW
(6)
Parameter
Max.
1
5
Unit
ms
ms
Power-up to initiation of read operation
Power-up to initiation of write operation
A.C. TEST CONDITIONS
Notes:
(5) This parameter is periodically sampled and not 100%
tested.
(6) t
PUR
and t
PUW
are the delays required from the time the
third (last) power supply (V
CC
, V+ or V-) is stable until
the specific instruction can be issued. These parameters
are
periodically sampled and not 100% tested.
(7) The power-up order of power supplies are V
CC
, V+
and V-.
SPICE Macro Model
Input pulse levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
C
W
R
TOTAL
R
H
R
L
C
H
R
W
C
L
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