參數(shù)資料
型號: X9429YV14Z
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: Single Digitally Controlled Potentiometer
中文描述: 2.5K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO14
封裝: 4.40 MM, GREEN, PLASTIC, TSSOP-14
文件頁數(shù): 16/21頁
文件大?。?/td> 367K
代理商: X9429YV14Z
16
FN8248.2
October 19, 2005
HIGH-VOLTAGE WRITE CYCLE TIMING
XDCP TIMING
Note:
(8) A device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the undefined region of the falling
edge of SCL.
TIMING DIAGRAMS
START and STOP Timing
Input Timing
Output Timing
Symbol
t
WR
Parameter
Typ.
5
Max.
10
Unit
ms
High-voltage write cycle time (store instructions)
Symbol
t
WRPO
t
WRL
t
WRID
Parameter
Min.
Max.
10
10
10
Unit
μs
μs
μs
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
Wiper response time from an active SCL/SCK edge (increment/decrement instruction)
t
SU:STA
t
HD:STA
t
SU:STO
SCL
SDA
t
R
(START)
(STOP)
t
F
t
R
t
F
SCL
SDA
t
HIGH
t
LOW
t
CYC
t
HD:DAT
t
SU:DAT
t
BUF
SCL
SDA
t
DH
t
AA
X9429
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