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參數資料
| 型號： | X9421YV14-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數字電位計 |
| 英文描述： | Single Digitally Controlled (XDCP) Potentiometer |
| 中文描述： | 2.5K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO14 |
| 封裝： | 4.40 MM, PLASTIC, TSSOP-14 |
| 文件頁數： | 4/21頁 |
| 文件大?。?/td> | 117K |
| 代理商： | X9421YV14-2.7 |
X9421
REV 1.1.6 8/1/02
Characteristics subject to change without notice.
4 of 21
www.xicor.com
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the potentiometer
and pot register are input on this pin. Data is latched by
the rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9421.
Chip Select (CS)
When CS is HIGH, the X9421 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9421, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A
The address input is used to set the least significant bit
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the address
input in order to initiate communication with the X9421.
A maximum of 2 devices may occupy the SPI serial
bus.
0
)
Potentiometer Pins
V
H
/R
H
, V
L
The V
H
/R
H
terminal connections on either end of a mechanical
potentiometer.
/R
and V
L
L
/R
L
inputs are equivalent to the
V
The wiper output is equivalent to the wiper output of a
mechanical potentiometer.
W
/R
W
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers. Writing to the Wiper Counter
Register is not restricted.
System/Digital Supply (V
V
CC
is the supply voltage for the system/digital section.
V
SS
is the system ground.
CC
)
PRINCIPLES OF OPERATION
The X9421 is a highly integrated microcircuit
incorporating a resistor array and associated registers
and counter and the serial interface logic providing
direct communication between the host and the XDCP
potentiometer.
Serial Interface
The X9421 supports the SPI interface hardware
conventions. The device is accessed via the SI input
with data clocked in on the rising SCK. CS must be
LOW and the HOLD and WP pins must be HIGH
during the entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
Array Description
The X9421 is comprised of one resistor array
containing 63 discrete resistive segments that are
connected in series. The physical ends of each array
are equivalent to the fixed terminals of a mechanical
potentiometer (V
H
/R
H
and V
L
/R
L
inputs).
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