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參數(shù)資料
| 型號： | X9421WS16IZT1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP SGL 64-TAP 10K 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 5 線 SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
5
FN8196.4
January 14, 2009
DEVICE ADDRESS (A0)
The address input is used to set the least significant bit of
the 8-bit slave address. A match in the slave address serial
data stream must be made with the address input in order to
initiate communication with the X9421. A maximum of two
devices may occupy the SPI serial bus.
Potentiometer Pins
VH/RH, VL/RL
The VH/RH and VL/RL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW/RW
The wiper output is equivalent to the wiper output of a
mechanical potentiometer.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to the
Data Registers. Writing to the Wiper Counter Register is not
restricted.
SYSTEM/DIGITAL SUPPLY (VCC)
VCC is the supply voltage for the system/digital section. VSS
is the system ground.
Principles of Operation
The X9421 is a highly integrated microcircuit incorporating a
resistor array and associated registers and counter and the
serial interface logic providing direct communication
between the host and the XDCP potentiometer.
Serial Interface
The X9421 supports the SPI interface hardware
conventions. The device is accessed via the SI input with
data clocked in on the rising SCK. CS must be LOW and the
HOLD and WP pins must be HIGH during the entire
operation.
The SO and SI pins can be connected together, since they
have three state outputs. This can help to reduce system pin
count.
Array Description
The X9421 is comprised of one resistor array containing 63
discrete resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (VH/RH and VL/RL
inputs).
At both ends of the array and between each resistor
segment is a CMOS switch connected to the wiper (VW/RW)
output. Within the individual array only one switch may be
turned on at a time.
These switches are controlled by a Wiper Counter Register
(WCR). The six bits of the WCR are decoded to select, and
enable, one of sixty-four switches. The block diagram of the
potentiometer is shown in Figure 1.
Wiper Counter Register (WCR)
The X9421 contains a Wiper Counter Register. The WCR
can be envisioned as a 6-bit parallel and serial load counter
with its outputs decoded to select one of sixty-four switches
along its resistor array. The contents of the WCR can be
altered in four ways: it may be written directly by the host via
the Write Wiper Counter Register instruction (serial load); it
may be written indirectly by transferring the contents of one
of four associated Data Registers via the XFR Data Register
instruction (parallel load); it can be modified one step at a
time by the Increment/Decrement instruction. Finally, it is
loaded with the contents of its data register zero (DR0) upon
power-up.
The Wiper Counter Register is a volatile register; that is, its
contents are lost when the X9421 is powered-down.
Although the register is automatically loaded with the value
in DR0 upon power-up, this may be different from the value
present at power-down.
Data Registers
The potentiometer has four 6-bit nonvolatile Data Registers.
These can be read or written directly by the host. Data can
also be transferred between any of the four Data Registers
and the WCR. It should be noted all operations changing
data in one of the Data Registers is a nonvolatile operation
and will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can be
used as regular memory locations for system parameters or
user preference data.
Register Descriptions
TABLE 1. DATA REGISTERS, (6-BIT), NONVOLATILE
There are four 6-bit Data Registers associated with the
potentiometer.
{D5~D0}: These bits are for general purpose Nonvolatile
data storage or for storage of up to four different wiper
values.
TABLE 2. WIPER COUNTER REGISTER, (6-BIT), VOLATILE
{WP5~WP0}: These bits specify the wiper position of the
potentiometer.
0
D5
D4
D3
D2
D1
D0
(MSB)
(LSB)
0
WP5WP4
WP3WP2
WP1WP0
(MSB)
(LSB)
X9421
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| X9421WS16T1 | 功能描述:IC XDCP SGL 64-TAP 10K 16-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
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