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參數(shù)資料
| 型號： | X9420WV14Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 15/19頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT 10K 1CH 14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 95 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | SPI 串行 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 管件 |
5
FN8195.1
April 26, 2006
Figure 1. Detailed Potentiometer Block Diagram
Write in Process
The contents of the Data Registers are saved to
nonvolatile memory when the CS pin goes from LOW to
HIGH after a complete write sequence is received by
the device. The progress of this internal write operation
can be monitored by a Write In Process bit (WIP). The
WIP bit is read with a Read Status command.
INSTRUCTIONS
Address/Identification (ID) Byte
The first byte sent to the X9420 from the host,
following a CS going HIGH to LOW, is called the
Address or Identification byte. The most significant
four bits of the slave address are a device type
identifier, for the X9420 this is fixed as 0101[B] (refer
to Figure 2).
The least significant bit in the ID byte selects one of
two devices on the bus. The physical device address
is defined by the state of the A0 input pin. The X9420
compares the serial data stream with the address
input state; a successful compare of the address bit is
required for the X9420 to successfully continue the
command sequence. The A0 input can be actively
driven by a CMOS input signal or tied to VCC or VSS.
The remaining three bits in the ID byte must be set to 110.
Figure 2. Address/Identification Byte Format
Instruction Byte
The next byte sent to the X9420 contains the
instruction and register pointer information. The four
most significant bits are the instruction. The next two
bits point to one of four data registers. The format is
shown below in Figure 3.
Figure 3. Instruction Byte Format
Serial Data Path
From Interface
Circuitry
Register 0
Register 1
REGISTER 2
REGISTER 3
Serial
Bus
Input
Parallel
Bus
Input
Counter
Register
INC/DEC
Logic
UP/DN
CLK
Modified SCK
UP/DN
VH
VL
VW
8
6
C
O
U
N
T
E
R
D
E
C
O
D
E
IF WCR = 00[H] THEN VW = VL
IF WCR = 3F[H] THEN VW = VH
Wiper
(WCR)
1
00
11
0A0
Device Type
Identifier
Device Address
1
I1
I2
I3
I0
R1
R0
0
Register
Select
Instructions
X9420
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9420WV14Z-2.7 | 功能描述:IC DGTL POT 10K 1CH 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9420WV14Z-2.7T1 | 功能描述:IC DGTL POT 10K 1CH 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9420WV14ZT1 | 功能描述:IC DGTL POT 10K 1CH 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9420WV-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer |
| X9420WVI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer |
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