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參數(shù)資料
| 型號： | X9418YP24I-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | VGA VIDEO CABLE 75 FT MF |
| 中文描述： | DUAL 2.5K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大?。?/td> | 386K |
| 代理商： | X9418YP24I-2.7 |
X9418
Characteristics subject to change without notice.
4 of 21
REV 1.1.5 7/23/02
www.xicor.com
Acknowledge Polling
The disabling of the inputs, during the internal
nonvolatile write operation, can be used to take
advantage of the typical 5ms EEPROM write cycle
time. Once the stop condition is issued to indicate the
end of the nonvolatile write command the X9418
initiates the internal write cycle. ACK polling can be
initiated immediately. This involves issuing the start
condition followed by the device slave address. If the
X9418 is still busy with the write operation no ACK will
be returned. If the X9418 has completed the write
operation an ACK will be returned, and the master can
then proceed with the next operation.
Flow 1. ACK Polling Sequence
Instruction Structure
The next byte sent to the X9418 contains the instruction
and register pointer information. The four most
significant bits are the instruction. The next four bits
point to one of the two pots and when applicable they
point to one of four associated registers. The format is
shown below in Figure 2.
Figure 2. Instruction Byte Format
The four high order bits define the instruction. The next
two bits (R1 and R0) select one of the four registers
that is to be acted upon when a register oriented
instruction is issued. The last bits (P0) select which
one of the two potentiometers is to be affected by the
instruction. Bit 1 is defined to be 0.
Four of the nine instructions end with the transmission
of the instruction byte. The basic sequence is
illustrated in Figure 3. These two-byte instructions
exchange data between the wiper counter register and
one of the data registers. A transfer from a Data
Register to a Wiper Counter Register is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed t
WRL
. A transfer from the wiper
counter register (current wiper position), to a Data
Register is a write to nonvolatile memory and takes a
minimum of t
WR
to complete. The transfer can occur
between one of the two potentiometers and one of its
associated registers; or it may occur globally, wherein
the transfer occurs between both of the potentiometers
and one of their associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9418; either between the host and one
of the Data Registers or directly between the host and
the wiper counter register. These instructions are:
Read Wiper Counter Register (read the current wiper
position of the selected pot), write Wiper Counter
Register (change current wiper position of the selected
pot), read Data Register (read the contents of the
selected nonvolatile register) and write Data Register
(write a new value to the selected Data Register). The
sequence of operations is shown in Figure 4.
Nonvolatile Write
Command Completed
Enter ACK Polling
Issue
START
Issue Slave
Address
ACK
Returned
Further
Operation
Issue
Instruction
Issue STOP
NO
YES
YES
Proceed
Issue STOP
NO
Proceed
I1
I2
I3
I0
R1
R0
0
P0
Wiper Counter
Register Select
Register
Select
Instructions
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