- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372540 > X9418 Dual 2-Wire EEPOT Nonvolatile Digital Potentiometer(2個(gè)EEPOT,IIC接口,直接寫入/讀出滑動(dòng)端位置,低噪聲,非易失性數(shù)字電位器) PDF資料下載
參數(shù)資料
| 型號(hào)： | X9418 |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Dual 2-Wire EEPOT Nonvolatile Digital Potentiometer(2個(gè)EEPOT,IIC接口,直接寫入/讀出滑動(dòng)端位置,低噪聲,非易失性數(shù)字電位器) |
| 中文描述： | 雙2線EEPOT非易失數(shù)字電位器（2個(gè)EEPOT，國(guó)際進(jìn)口接口，直接寫入/讀出滑動(dòng)端位置，低噪聲，非易失性數(shù)字電位器） |
| 文件頁數(shù)： | 3/20頁 |
| 文件大小： | 139K |
| 代理商： | X9418 |
X9418
3
PRINCIPLES OF OPERATION
The X9418 is a highly integrated microcircuit
incorporating two resistor arrays and their associated
registers and counters and the serial interface logic
providing direct communication between the host and the
EEPOT potentiometers.
Serial Interface
The X9418 supports a bidirectional bus oriented
protocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave. The
master will always initiate data transfers and provide the
clock for both transmit and receive operations. Therefore,
the X9418 will be considered a slave device in all
applications.
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW periods (t
LOW
). SDA state changes during SCL
HIGH are reserved for indicating start and stop
conditions.
Start Condition
All commands to the X9418 are preceded by the start
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH (t
HIGH
monitors the SDA and SCL lines for the start condition
and will not respond to any command until this condition
is met.
). The X9418 continuously
Stop Condition
All communications must be terminated by a stop
condition, which is a LOW to HIGH transition of SDA
while SCL is HIGH.
Acknowledge
Acknowledge is a software convention used to provide a
positive handshake between the master and slave
devices on the bus to indicate the successful receipt of
data. The transmitting device, either the master or the
slave, will release the SDA bus after transmitting eight
bits. The master generates a ninth clock cycle and during
this period the receiver pulls the SDA line LOW to
acknowledge that it successfully received the eight bits of
data.
The X9418 will respond with an acknowledge after
recognition of a start condition and its slave address and
once again after successful receipt of the command byte.
If the command is followed by a data byte the X9418 will
respond with a final acknowledge.
Array Description
The X9418 is comprised of two resistor arrays. Each
array contains 63 discrete resistive segments that are
connected in series. The physical ends of each array are
equivalent to the fixed terminals of a mechanical potenti-
ometer (V
H
and V
L
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper (V
output. Within each individual array only one switch may
be turned on at a time. These switches are controlled by
the Wiper Counter Register (WCR). The six bits of the
WCR are decoded to select, and enable, one of sixty-four
switches.
W
)
The WCR may be written directly, or it can be changed by
transferring the contents of one of four associated data
registers into the WCR. These data registers and the
WCR can be read and written by the host system.
Device Addressing
Following a start condition the master must output the
address of the slave it is accessing. The most significant
four bits of the slave address are the device type identifier
(refer to Figure 1 below). For the X9418 this is fixed as
0101[B].
Figure 1. Slave Address
7028 FM3
The next four bits of the slave address are the device
address. The physical device address is defined by the
state of the A0-A3 inputs. The X9418 compares the serial
data stream with the address input state; a successful
compare of all four address bits is required for the X9418
to respond with an acknowledge. The A
be actively driven by CMOS input signals or tied to V
or V
SS
.
0
–A
3
inputs can
CC
1
0
0
A3
A2
A1
A0
DEVICE TYPE
IDENTIFIER
DEVICEADDRESS
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| x9440 | Dual Digitally-Controlled (EEPOT) Potentiometer & Voltage Comparator(雙數(shù)控電位器和電壓比較器) |
| x9455(中文) | Dual Two-wiper Digitally-Controlled Potentiometer(帶兩個(gè)滑動(dòng)端的雙路數(shù)控電位器) |
| X9470 | RF Power Amplifier (PA) Bias Controller |
| X9470V24I | RF Power Amplifier (PA) Bias Controller |
| X9470 | RF Power Amplifier (PA) Bias Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9418_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometers |
| X9418-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometers |
| X9418WP24 | 功能描述:IC XDCP DUAL 64-TAP 10K 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲(chǔ)器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| X9418WP24-2.7 | 功能描述:IC XDCP DUAL 64-TAP 10K 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲(chǔ)器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| X9418WP24I | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometers |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。