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參數(shù)資料
| 型號： | X9408YV24IT1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/20頁 |
| 文件大小： | 0K |
| 描述： | IC XDCP QUAD 64-TAP 2.5K 24TSSOP |
| 標準包裝： | 2,500 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 2.5k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標準值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
5
FN8191.4
January 15, 2009
Flow 1. ACK Polling Sequence
Instruction Structure
The next byte sent to the X9408 contains the instruction and
register pointer information. The four most significant bits are
the instruction. The next four bits point to one of the two pots
and when applicable they point to one of four associated
registers. The format is shown in Figure 2.
The four high order bits define the instruction. The next two
bits (R1 and R0) select one of the four registers that is to be
acted upon when a register oriented instruction is issued.
The last bits (P1, P0) select which one of the four
potentiometers is to be affected by the instruction.
Four of the nine instructions end with the transmission of the
instruction byte. The basic sequence is illustrated in
Figure 3. These two-byte instructions exchange data
between the Wiper Counter Register and one of the Data
Registers. A transfer from a Data Register to a Wiper
Counter Register is essentially a write to a static RAM. The
response of the wiper to this action will be delayed tWRL. A
transfer from the Wiper Counter Register (current wiper
position), to a data register is a write to nonvolatile memory
and takes a minimum of tWR to complete. The transfer can
occur between one of the four potentiometers and one of its
associated registers; or it may occur globally, wherein the
transfer occurs between all of the potentiometers and one of
their associated registers.
Four instructions require a three-byte sequence to complete.
These instructions transfer data between the host and the
X9408; either between the host and one of the data registers
or directly between the host and the Wiper Counter Register.
These instructions are: Read Wiper Counter Register (read
the current wiper position of the selected pot), Write Wiper
Counter Register (change current wiper position of the
selected pot), Read Data Register (read the contents of the
selected nonvolatile register) and Write Data Register (write
a new value to the selected Data Register). The sequence of
operations is shown in Figure 4.
NON-VOLATILE WRITE
COMMAND COMPLETED
ENTER ACK POLLING
ISSUE
START
ISSUE SLAVE
ADDRESS
ACK
RETURNED?
FURTHER
OPERATION?
ISSUE
INSTRUCTION
ISSUE STOP
NO
YES
PROCEED
ISSUE STOP
NO
PROCEED
I1
I2
I3
I0
R1
R0
P1
P0
WIPER COUNTER
REGISTER
SELECT
INSTRUCTIONS
REGISTER SELECT
FIGURE 2. INSTRUCTION BYTE FORMAT
S
T
A
R
T
0101
A3
A2
A1
A0
A
C
K
I3
I2
I1
I0
R1
R0
P1
P0
A
C
K
SCL
SDA
S
T
O
P
FIGURE 3. TWO-BYTE INSTRUCTION SEQUENCE
X9408
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| X9408YV24IZ-2.7T1 | 功能描述:IC POT DGTL QUAD 2.5KOHM 24TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標準值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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