參數(shù)資料
型號: X9400YZ24I-2.7
元件分類: 數(shù)字電位計(jì)
英文描述: QUAD 2.5K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PBGA24
封裝: XBGA-24
文件頁數(shù): 20/22頁
文件大?。?/td> 148K
代理商: X9400YZ24I-2.7
X9400
Characteristics subject to change without notice.
7 of 22
REV 1.1.4 10/11/02
www.xicor.com
Figure 8. Increment/Decrement Timing Limits
Table 1. Instruction Set
Instruction
Instruction Set
Operation
I3
I2
I1
I0 R1 R0 P1 P0
Read Wiper Counter Register
1
0010
0
P1
P0 Read the contents of the Wiper Counter Register
pointed to by P1-P0
Write Wiper Counter Register
1
0100
0
P1
P0 Write new value to the Wiper Counter Register
pointed to by P1-P0
Read Data Register
1
0
1
R1 R0 P1
P0 Read the contents of the Data Register pointed
to by P1-P0 and R1–R0
Write Data Register
1
0
R1 R0 P1
P0 Write new value to the Data Register pointed to
by P1-P0 and R1–R0
XFR Data Register to Wiper
Counter Register
1
101
R1 R0 P1
P0 Transfer the contents of the Data Register pointed
to by R1–R0 to the Wiper Counter Register pointed
to by P1-P0
XFR Wiper Counter Register
to Data Register
1
110
R1 R0 P1
P0 Transfer the contents of the Wiper Counter
Register pointed to by P1-P0 to the Register
pointed to by R1–R0
Global XFR Data Register to
Wiper Counter Register
0
001
R1 R0
0
Transfer the contents of the Data Registers
pointed to by R1–R0 of all four pots to their
respective Wiper Counter Register
Global XFR Wiper Counter
Register to Data Register
1
000
R1 R0
0
Transfer the contents of all Wiper Counter
Registers to their respective data Registers
pointed to by R1–R0 of all four pots
Increment/Decrement Wiper
Counter Register
0
0100
0
P1
P0 Enable Increment/decrement of the Wiper
Counter Register pointed to by P1-P0
Read Status (WIP bit)
0
1010
0
1
Read the status of the internal write cycle, by
checking the WIP bit.
SCK
SI
VW/RW
INC/DEC CMD Issued
tWRID
Voltage Out
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