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參數(shù)資料
型號(hào): X9400WV24IZ-2.7
廠商: Intersil
文件頁(yè)數(shù): 18/19頁(yè)
文件大小: 0K
描述: IC XDCP QUAD 64-TAP 10K 24-TSSOP
標(biāo)準(zhǔn)包裝: 62
系列: XDCP™
接片: 64
電阻(歐姆): 10k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 6 線 SPI(芯片選擇,設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
8
FN8189.3
July 28, 2006
Figure 8. Increment/Decrement Timing Limits
Table 1. Instruction Set
Instruction
Instruction Set
Operation
I3 I2 I1 I0 R1 R0 P1 P0
Read Wiper Counter Register
1
0
1
0
P1 P0 Read the contents of the Wiper Counter Register
pointed to by P1 - P0
Write Wiper Counter Register
1
0
1
0
P1 P0 Write new value to the Wiper Counter Register
pointed to by P1 - P0
Read Data Register
1
0
1
R1 R0 P1 P0 Read the contents of the Data Register pointed to
by P1 - P0 and R1 - R0
Write Data Register
1
0
R1 R0 P1 P0 Write new value to the Data Register pointed to by
P1 - P0 and R1 - R0
XFR Data Register to Wiper
Counter Register
11
0
1
R1 R0 P1 P0 Transfer the contents of the Data Register pointed to
by R1 - R0 to the Wiper Counter Register pointed to by
P1 - P0
XFR Wiper Counter Register
to Data Register
11
1
0
R1 R0 P1 P0 Transfer the contents of the Wiper Counter
Register pointed to by P1 - P0 to the Register
pointed to by R1 - R0
Global XFR Data Register to
Wiper Counter Register
00
0
1
R1 R0
0
Transfer the contents of the Data Registers pointed
to by R1 - R0 of all four pots to their respective Wiper
Counter Register
Global XFR Wiper Counter
Register to Data Register
10
0
R1 R0
0
Transfer the contents of all Wiper Counter
Registers to their respective data Registers
pointed to by R1 - R0 of all four pots
Increment/Decrement Wiper
Counter Register
00
1
0
P1 P0 Enable Increment/decrement of the Wiper Counter
Register pointed to by P1 - P0
Read Status (WIP bit)
0
1
0
1
0
1
Read the status of the internal write cycle, by
checking the WIP bit.
SCK
SI
VW/RW
INC/DEC CMD Issued
tWRID
Voltage Out
X9400
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