參數(shù)資料
型號: X9313WPZ-3
廠商: Intersil
文件頁數(shù): 1/12頁
文件大?。?/td> 0K
描述: IC XDCP 3-WIRE 32-TAP 10K 8-PDIP
標準包裝: 50
系列: XDCP™
接片: 32
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標準值 ±300 ppm/°C
存儲器類型: 非易失
接口: 3 線串行(芯片選擇,遞增,增/減)
電源電壓: 3 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
1
FN8177.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9313
Digitally Controlled Potentiometer (XDCP)
Linear, 32 Taps, 3 Wire Interface, Terminal
Voltages ± VCC
The Intersil X9313 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:
Control
Parameter adjustments
Signal processing
Features
Solid-state potentiometer
3-wire serial interface
32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
31 resistive elements
- Temperature compensated
- End-to-end resistance range ±20%
- Terminal voltages, -VCC to +VCC
Low power CMOS
-VCC = 3V or 5V
- Active current, 3mA max.
- Standby current, 500A max.
High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
RTOTAL values = 1kΩ, 10kΩ, 50kΩ
Packages
- 8 Ld SOIC, 8 Ld MSOP and 8 Ld PDIP
Pb-free available (RoHS compliant)
Block Diagram
5-BIT
NONVOLATILE
MEMORY
STORE AND
RECALL
CONTROL
CIRCUITRY
ONE OF
OUTPUTS
RESISTOR
ARRAY
RH/VH
U/D
INC
CS
TRANSFER
GATES
THIRTY-TWO
VCC
VSS
RL/VL
RW/VW
CONTROL
UP/DOWN
VCC (SUPPLY VOLTAGE)
VSS (GROUND)
RH/VH
RW/VW
RL/VL
GENERAL
DETAILED
0
1
2
28
29
30
31
(U/D)
INCREMENT
(INC)
DEVICE SELECT
(CS)
AND
MEMORY
5-BIT
UP/DOWN
COUNTER
TIME
DECODER
ACTIVE
AT A
Data Sheet
January 15, 2008
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