參數(shù)資料
型號: X9268TS24Z
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: Dual Digitally-Controlled Potentiometers
中文描述: DUAL 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-013AD, SOIC-24
文件頁數(shù): 14/22頁
文件大小: 328K
代理商: X9268TS24Z
14
FN8172.4
August 29, 2006
Global XFR Wiper Counter Register (WCR) to Data Register (DR)
Transfer Wiper Counter Register (WCR) to Data Register (DR)
Transfer Data Register (DR) to Wiper Counter Register (WCR)
Increment/Decrement Wiper Counter Register (WCR)
Notes: (1) “MACK”/”SACK”: stands for the acknowledge sent by the master/slave.
(2) “A3 ~ A0”: stands for the device addresses sent by the master.
(3) “X”: indicates that it is a “0” for testing purpose but physically it is a “don’t care” condition.
(4) “I”: stands for the increment operation, SDA held high during active SCL phase (high).
(5) “D”: stands for the decrement operation, SDA held low during active SCL phase (high).
S
T
A
R
T
Device Type
Identifier
Device
Addresses
S
A
C
K
Instruction
Opcode
DR/WCR
Addresses
S
A
C
K
S
T
O
P
HIGH-VOLTAGE
WRITE CYCLE
0
1
0
1
A3 A2 A1 A0
1
0
0
0 RB RA 0
0
S
T
A
R
T
Device Type
Identifier
Device
Addresses
S
A
C
K
Instruction
Opcode
DR/WCR
Addresses
S
A
C
K
S
T
O
P
HIGH-VOLTAGE
WRITE CYCLE
0
1
0
1
A3 A2 A1 A0
1
1
1
0 RB RA
0
P0
S
T
A
R
T
Device Type
Identifier
Device
Addresses
S
A
C
K
Instruction
Opcode
DR/WCR
Addresses
S
A
C
K
S
T
O
P
0
1
0
1
A3 A2 A1 A0
1 1
0 1 RB RA
0
P0
S
T
A
R
T
Device Type
Identifier
Device
Addresses
S
A
C
K
Instruction
Opcode
DR/WCR
Addresses
S
A
C
K
Increment/Decrement
(Sent by Master on SDA)
S
T
O
P
0
1
0
1 A3 A2 A1 A0
0
0
1
0
0
0
0
P0
I/D I/D
.
.
.
.
I/D I/D
X9268
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