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參數(shù)資料
| 型號： | X9268TS24-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Dual Supply/Low Power/256-Tap/2-Wire Bus |
| 中文描述： | DUAL 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24 |
| 封裝： | 0.300 INCH, PLASTIC, MS-013AD, SOIC-24 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 368K |
| 代理商： | X9268TS24-2.7 |
16
FN8172.1
June 21, 2005
D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER-UP AND DOWN REQUIREMENTS
The are no restrictions on the sequencing of the bias supplies V
CC
, V+, and V- provided that all three supplies reach
their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less than V+
and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies reach their
final value. The V
CC
ramp rate spec is always in effect.
A.C. TEST CONDITIONS
Notes: (6) This parameter is not 100% tested
(7) t
PUR
and t
PUW
are the delays required from the time the (last) power supply (V
CC
-) is stable until the specific instruction can be issued.
These parameters are periodically sampled and not 100% tested.
Symbol
I
CC1
Parameter
Limits
Typ.
Test Conditions
Min.
Max.
3
Units
mA
V
CC
supply current
(active)
f
SCL
= 400kHz; V
CC
= +6V;
SDA = Open; (for 2-Wire, Active, Read and
Volatile Write States only)
f
SCL
= 400kHz; V
CC
= +6V;
SDA = Open; (for 2-Wire, Active,
Nonvolatile Write State only)
VCC = +6V; VIN = VSS or VCC;
SDA = VCC; (for 2-Wire, Standby State only)
V
IN
= V
SS
to V
CC
V
OUT
= V
SS
to V
CC
I
CC2
V
CC
supply current
(nonvolatile write)
5
mA
I
SB
V
CC
current (standby)
5
μ
A
I
LI
I
LO
V
IH
V
IL
V
OL
V
OH
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
Output HIGH voltage
10
10
μ
A
μ
A
V
V
V
V
CC
x 0.7
-1
V
CC
+ 1
V
CC
x 0.3
0.4
I
OL
= 3mA
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Units
Data changes per bit per register
years
Symbol
C
IN/OUT(6)
C
IN(6)
Test
Max.
8
6
Units
pF
pF
Test Conditions
V
OUT
= 0V
V
IN
= 0V
Input / Output capacitance (SDA)
Input capacitance (
SCL, WP, A3, A2, A1 and A0
)
Symbol
t
r
V
CC(6)
t
PUR(7)
Parameter
Min.
Max.
Units
V
CC
Power-up rate
0.2
50
V/ms
Power-up to initiation of read operation
1
ms
I
nput Pulse Levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
X9268
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