參數(shù)資料
型號: X9261UV24IZ
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: Standard Recovery Power Rectifier; Gate Trigger Current Max, Igt:35mA; Forward Current:55A; Leaded Process Compatible:Yes; Mounting Type:PCB Thru Hole; Package/Case:TO-220AB; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes
中文描述: DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 4.40 MM, ROHS COMPLIANT, PLASTIC, MO-153, TSSOP-24
文件頁數(shù): 14/21頁
文件大小: 393K
代理商: X9261UV24IZ
14
FN8171.2
September 14, 2005
D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER-UP AND DOWN REQUIREMENTS
The are no restrictions on the power-up or power-down conditions of V
CC
and the voltages applied to the poten-
tiometer pins provided that V
CC
is always more positive than or equal to V
H
, V
L
, and V
W
, i.e., V
CC
V
H
, V
L
, V
W
. The
V
CC
power-up timing spec is always in effect.
A.C. TEST CONDITIONS
Notes: (6) This parameter is not 100% tested
(7) t
PUR
and t
PUW
are the delays required from the time the (last) power supply (V
CC
-) is stable until the specific instruction can be issued.
These parameters are periodically sampled and not 100% tested.
Symbol
I
CC1
Parameter
Limits
Typ.
Test Conditions
Min.
Max.
400
Units
μ
A
V
CC
supply current
(active)
V
CC
supply current
(nonvolatile write)
V
CC
current (standby)
f
SCK
= 2.5 MHz, SO = Open, V
CC
= 6V
Other Inputs = V
SS
f
SCK
= 2.5MHz, SO = Open, V
CC
= 6V
Other Inputs = V
SS
SCK = SI = V
SS
, Addr. = V
SS
,
CS = V
CC
= 6V
V
IN
= V
SS
to V
CC
V
OUT
= V
SS
to V
CC
I
CC2
1
5
mA
I
SB
5
μ
A
I
LI
I
LO
V
IH
V
IL
V
OL
V
OH
V
OH
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
Output HIGH voltage
Output HIGH voltage
10
10
μ
A
μ
A
V
V
V
V
V
V
CC
x 0.7
-1
V
CC
+ 1
V
CC
x 0.3
0.4
I
OL
= 3mA
I
OH
= -1mA, V
CC
+3V
I
OH
= -0.4mA, V
CC
+3V
V
CC
- 0.8
V
CC
- 0.4
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Units
Data changes per bit per register
years
Symbol
C
OUT(6)
C
IN(6)
Test
Max.
8
6
Units
pF
pF
Test Conditions
V
OUT
= 0V
V
IN
= 0V
Output capacitance (SO)
Input capacitance (A0, A1, SI, CS, WP, HOLD, and SCK)
Symbol
t
r
V
CC(6)
t
PUR(7)
Parameter
Min.
0.2
Max.
50
1
Units
V/ms
ms
V
CC
Power-up rate
Power-up to initiation of read operation
I
nput Pulse Levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
X9261
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