參數(shù)資料
型號(hào)： X9261US24IZT1
廠商： Intersil
文件頁數(shù)： 18/20頁
文件大?。?/td> 0K
描述： IC XDCP DUAL 256TAP 50K 24-SOIC
標(biāo)準(zhǔn)包裝： 1,000
系列： XDCP™
接片： 256
電阻（歐姆）： 50k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型： 非易失
接口： 6 線 SPI（芯片選擇，設(shè)備位址）
電源電壓： 4.5 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC
包裝： 帶卷 (TR)
7
FN8171.4
October 12, 2006
Register Selection
DEVICE DESCRIPTION
Instructions
Four of the ten instructions are three bytes in length.
These instructions are:
– Read Wiper Counter Register – read the current
wiper position of the selected potentiometer,
– Write Wiper Counter Register – change current
wiper position of the selected potentiometer,
– Read Data Register – read the contents of the
selected Data Register;
– Write Data Register – write a new value to the
selected Data Register.
– Read Status - This command returns the contents
of the WIP bit which indicates if the internal write
cycle is in progress.
The basic sequence of the three byte instructions is
illustrated in Figure 3. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the
wiper to this action will be delayed by tWRL. A transfer
from the WCR (current wiper position), to a Data
Register is a write to nonvolatile memory and takes a
minimum of tWR to complete. The transfer can occur
between one of the two potentiometers and one of its
associated registers; or it may occur globally, where
the transfer occurs between all potentiometers and
one associated register. The Read Status Register
instruction is the only unique format (See Figure 5).
Four instructions require a two-byte sequence to
complete. These instructions transfer data between
the host and the X9261; either between the host and
one of the data registers or directly between the host
and the Wiper Counter Register. These instructions
are:
– XFR Data Register to Wiper Counter Register –
This transfers the contents of one specified Data
Register to the associated Wiper Counter Register.
– XFR Wiper Counter Register to Data Register –
This transfers the contents of the specified Wiper
Counter Register to the specified associated Data
Register.
– Global XFR Data Register to Wiper Counter
Register – This transfers the contents of all speci-
fied Data Registers to the associated Wiper Counter
Registers.
– Global XFR Wiper Counter Register to Data
Register – This transfers the contents of all Wiper
Counter Registers to the specified associated Data
Registers.
INCREMENT/DECREMENT COMMAND
The final command is Increment/Decrement (See
Figures 6 and 7). The Increment/Decrement command
is different from the other commands. Once the
command is issued and the X9261 has responded
with an acknowledge, the master can clock the
selected wiper up and/or down in one segment steps;
thereby, providing a fine tuning capability to the host.
For each SCL clock pulse (tHIGH) while SI is HIGH,
the selected wiper will move one resistor segment
towards the RH terminal. Similarly, for each SCL clock
pulse while SI is LOW, the selected wiper will move
one resistor segment towards the RL terminal. A
detailed illustration of the sequence and timing for this
operation are shown. See Instruction format for more
details.
Register Selected
RB
RA
DR0
0
DR1
0
1
DR2
1
0
DR3
1
X9261
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X9261US24T1 功能描述:IC XDCP DUAL 256TAP 50K 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲(chǔ)器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR)
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