參數(shù)資料
型號: X9260US24Z
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Dual Digitally-Controlled Potentiometers
中文描述: DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-013AD, SOIC-24
文件頁數(shù): 2/23頁
文件大小: 346K
代理商: X9260US24Z
2
FN8170.3
August 29, 2006
DETAILED FUNCTIONAL DIAGRAM
Ordering Information
PART NUMBER
PART
MARKING
V
CC
LIMITS (V)
POTENTIOMETER
ORGANIZATION
(k
Ω
)
TEMPERATURE
RANGE (°C)
PACKAGE
PKG. DWG. #
X9260TS24I
X9260TS I
5 ±10%
100
-40 to +85
24 Ld SOIC (300 mil)
M24.3
X9260TS24IZ (Note)
X9260TS ZI
-40 to +85
24 Ld SOIC (300 mil)
(Pb-free)
M24.3
X9260US24
X9260US
50
0 to +70
24 Ld SOIC (300 mil)
M24.3
X9260US24Z (Note)
X9260US Z
0 to +70
24 Ld SOIC (300 mil)
(Pb-free)
M24.3
X9260TS24I-2.7
X9260TS G
2.7 to 5.5
100
-40 to +85
24 Ld SOIC (300 mil)
M24.3
X9260TS24IZ-2.7 (Note) X9260TS ZG
-40 to +85
24 Ld SOIC (300 mil)
(Pb-free)
M24.3
X9260US24-2.7
X9260US F
50
0 to +70
24 Ld SOIC (300 mil)
M24.3
X9260US24Z-2.7 (Note) X9260US ZF
0 to +70
24 Ld SOIC (300 mil)
(Pb-free)
M24.3
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
R
0
R
1
R
2
R
3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 1
R
H1
R
L1
R
0
R
1
R
2
R
3
Wiper
Counter
Register
(WCR)
R
H0
R
L0
Data
8
R
W0
R
W1
Pot 0
INTERFACE
AND
CONTROL
CIRCUITRY
V
CC
V
SS
256-taps
50K
Ω
and 100K
Ω
CS
SCK
SO
A0
A1
SI
HOLD
WP
Power-on
Recall
Power-on
Recall
V
+
V-
X9260
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