參數(shù)資料
型號: X9260TS24IZ
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Dual Digitally-Controlled Potentiometers
中文描述: DUAL 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-013AD, SOIC-24
文件頁數(shù): 7/23頁
文件大小: 346K
代理商: X9260TS24IZ
7
FN8170.3
August 29, 2006
Table 5. Wiper Counter Register, WCR (8-bit), WCR[7:0]:
Used to store the current wiper position (Volatile, V).
Table 5. Data Register, DR (8-bit), Bit [7:0]:
Used to store wiper positions or data (Nonvolatile, NV).
DEVICE DESCRIPTION
Instructions
I
DENTIFICATION
B
YTE
( ID
AND
A )
The first byte sent to the X9260 from the host,
following a CS going HIGH to LOW, is called the
Identification Byte. The most significant four bits of the
slave address are a device type identifier. The ID[3:0]
bits is the device id for the X9260; this is fixed as
0101[B] (refer to Table 3).
The AD[3:0] bits in the ID byte is the internal slave
address. The physical device address is defined by
the state of the A3 - A0 input pins. The slave address
is externally specified by the user. The X9260
compares the serial data stream with the address
input state; a successful compare of both address bits
is required for the X9260 to successfully continue the
command sequence. Only the device which slave
address matches the incoming device address sent
by the master executes the instruction. The A3 - A0
inputs can be actively driven by CMOS input signals
or tied to V
CC
or V
SS
.
I
NSTRUCTION
B
YTE
( I[3:0] )
The next byte sent to the X9260 contains the instruction
and register pointer information. The three most
significant bits are used provide the instruction opcode
(I[3:0]). The RB and RA bits point to one of the four
Data Registers of each associated XDCP. The least
significant bit points to one of two Wiper Counter
Registers or Pots.The format is shown below in Table 4.
Table 3. Identification Byte Format
Table 4. Instruction Byte Format
WCR7
V
(MSB)
WCR6
V
WCR5
V
WCR4
V
WCR3
V
WCR2
V
WCR1
V
WCR0
V
(LSB)
Bit 7
NV
MSB
Bit 6
NV
Bit 5
NV
Bit 4
NV
Bit 3
NV
Bit 2
NV
Bit 1
NV
Bit 0
NV
LSB
ID3
0
(MSB)
ID2
1
ID1
0
ID0
1
A3
A2
A1
A0
(LSB)
Device Type
Identifier
Slave Address
I3
I2
I1
I0
RB
RA
0
P0
(MSB)
(LSB)
Instruction
Opcode
Data
Register
Pot Selection
(WCR Selection)
Selection
X9260
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