參數(shù)資料
型號(hào)： X9259US24Z-2.7T1
廠商： Intersil
文件頁(yè)數(shù)： 16/21頁(yè)
文件大小： 0K
描述： IC XDCP QUAD 256TAP 50K 24-SOIC
標(biāo)準(zhǔn)包裝： 1,000
系列： XDCP™
接片： 256
電阻（歐姆）： 50k
電路數(shù)： 4
溫度系數(shù)： 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型： 非易失
接口： I²C（設(shè)備位址）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC
包裝： 帶卷 (TR)
4
FN8169.5
April 13, 2007
Pin Descriptions
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for a 2-
Wire slave device and is used to transfer data into and out of
the device. It receives device address, opcode, wiper
register address and data sent from a 2-Wire master at the
rising edge of the serial clock SCL, and it shifts out data after
each falling edge of the serial clock SCL.
It is an open drain output and may be wire-ORed with any
number of open drain or open collector outputs. An open
drain output requires the use of a pull-up resistor.
SERIAL CLOCK (SCL)
This input is used by 2-Wire master to supply 2-Wire serial
clock to the X9259.
DEVICE ADDRESS (A3 THROUGH A0)
The Address inputs are used to set the least significant 4 bits
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the Address input in
order to initiate communication with the X9259. A maximum
of 16 devices may occupy the 2-Wire serial bus. Device pins
A3 through A0 must be tied to a logic level which specifies
the external address of the device, see Figures 3, 4, and 5.
Potentiometer Pins
RH, RL
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer. Since there are
4 potentiometers, there are 4 sets of RH and RL such that
RH0 and RL0 are the terminals of DCP0 and so on.
RW
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4 potentiometers,
there are 4 sets of RW such that RW0 is the terminal of
DCP0 and so on.
Bias Supply Pins
SYSTEM SUPPLY VOLTAGE (VCC) AND SUPPLY
GROUND (VSS)
The VCC pin is the system supply voltage. The VSS pin is
the system ground.
Other Pins
NO CONNECT
No connect pins should be left open. This pins are used for
Intersil manufacturing and testing purposes.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents non-volatile writes to the
Data Registers.
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
DR#0
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
COUNTER
REGISTER
INC/DEC
LOGIC
UP/DN
CLK
MODIFIED SCK
UP/DN
8
COUNTER
IF WCR = 00[H] then RW is closest to RL
IF WCR = FF[H] then RW is closest to RH
WIPER
(WCR#)
#: 0, 1, 2, or 3
One of Four Potentiometers
DR#2
DR#1
DR#3
- - -
DECODE
DCP
CORE
RW
RH
RL
FIGURE 1. DETAILED POTENTIOMETER BLOCK DIAGRAM
X9259
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