參數(shù)資料
型號: X9258US24IZ-2.7T1
廠商: Intersil
文件頁數(shù): 13/19頁
文件大?。?/td> 0K
描述: IC DGTL POT QUAD 100K 24SOIC
標準包裝: 1,000
系列: XDCP™
接片: 256
電阻(歐姆): 100k
電路數(shù): 4
溫度系數(shù): 標準值 ±300 ppm/°C
存儲器類型: 非易失
接口: I²C(設備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 24-SOIC
包裝: 帶卷 (TR)
3
FN8168.6
December 15, 2011
Pinout
X9258
(24 LD SOIC, TSSOP)
TOP VIEW
Pin Descriptions
Host Interface Pins
SERIAL CLOCK (SCL)
The SCL input is used to clock data into and out of the X9258.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data into and out of
the device. It is an open drain output and may be wire-ORed
with any number of open drain or open collector outputs. An
open drain output requires the use of a pull-up resistor. For
selecting typical values, refer to “Guidelines for Calculating
DEVICE ADDRESS (A0 - A3)
The Address inputs are used to set the least significant 4 bits
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the address input in
order to initiate communication with the X9258. A maximum
of 16 devices may occupy the 2-wire serial bus.
Potentiometer Pins
VH/RH (VH0/RH0 - VH3/RH3), VL/RL (VL0/RL0 - VL3/RL3)
The VH/RH and VL/RL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW/RW (VW0/RW0 - VW3/RW3)
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to the Data
Registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages for the
DCP analog section.
Pin Names
Principles Of Operation
The X9258 is a highly integrated microcircuit incorporating
four resistor arrays and their associated registers and
counters and the serial interface logic providing direct
communication between the host and the DCP
potentiometers.
Serial Interface (2-Wire)
The X9258 supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is a master and the
device being controlled is the slave. The master will always
initiate data transfers and provide the clock for both transmit
and receive operations. Therefore, the X9258 will be
considered a slave device in all applications.
NC
A0
VW3/RW3
V+
VCC
VL0/RL0
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
A3
SCL
VL2/RL2
VH2/RH2
VW2/RW2
V–
VSS
VW1/RW1
VH1/RH1
VL1/RL1
X9258
VH3/RH3
14
13
11
12
VL3/RL3
VH0/RH0
VW0/RW0
A2
A1
SDA
WP
SYMBOL
DESCRIPTION
SCL
Serial Clock
SDA
Serial Data
A0 thru A3
Device Address
VH0/RH0 thru VH3/RH3,
VL0/RL0 thru VL3/RL3
Potentiometer Pins
(terminal equivalent)
VW0/RW0 thru VW3/RW3
Potentiometers Pins
(wiper equivalent)
WP
Hardware Write Protection
V+, V-
Analog Supplies
VCC
System Supply Voltage
VSS
System Ground
NC
No Connection (Allowed)
X9258
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