參數(shù)資料
型號: X9251US24I
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Triac; Thyristor Type:Logic Level; Peak Repetitive Off-State Voltage, Vdrm:800V; On State RMS Current, IT(rms):8A; Gate Trigger Current (QI), Igt:10mA; Current, It av:8A; Gate Trigger Current Max, Igt:10mA RoHS Compliant: Yes
中文描述: QUAD 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 0.300 INCH, PLASTIC, SOIC-24
文件頁數(shù): 10/25頁
文件大?。?/td> 549K
代理商: X9251US24I
X9251
Characteristics subject to change without notice.
10 of 25
REV 1.3.3 2/10/04
www.xicor.com
Instructions
Four of the nine instructions are three bytes in length.
These instructions are:
Read Wiper Counter Register
– read the current
wiper position of the selected potentiometer,
Write Wiper Counter Register
– change current
wiper position of the selected potentiometer,
Read Data Register
– read the contents of the
selected Data Register,
Write Data Register
– write a new value to the
selected Data Register,
Read Status
– this command returns the contents of
the WIP bit which indicates if the internal write cycle
is in progress.
The basic sequence of the three byte instructions is
illustrated in Figure 3. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the
wiper to this action is delayed by t
WRL
. A transfer from
the WCR (current wiper position), to a Data Register is
a write to non-volatile memory and takes a minimum of
t
WR
to complete. The transfer can occur between one
of the four potentiometer’s WCR, and one of its
associated registers, DRs; or it may occur globally,
where the transfer occurs between all potentiometers
and one associated register. The Read Status Register
instruction is the only unique format (see Figure 5).
Four instructions require a two-byte sequence to
complete. These instructions transfer data between the
host and the X9251; either between the host and one
of the data registers or directly between the host and
the Wiper Counter Register. These instructions are:
XFR Data Register to Wiper Counter Register
This transfers the contents of one specified Data
Register to the associated Wiper Counter Register.
XFR Wiper Counter Register to Data Register
This transfers the contents of the specified Wiper
Counter Register to the specified associated Data
Register.
Global XFR Data Register to Wiper Counter
Register
– This transfers the contents of all specified
Data Registers to the associated Wiper Counter
Registers.
Global XFR Wiper Counter Register to Data
Register
– This transfers the contents of all Wiper
Counter Registers to the specified associated Data
Registers.
INCREMENT/DECREMENT COMMAND
The final command is Increment/Decrement (see
Figures 6 and 7). The Increment/Decrement command
is different from the other commands. Once the
command is issued and the X9251 has responded with
an Acknowledge, the master can clock the selected
wiper up and/or down in one segment steps; thereby,
providing a fine tuning capability to the host. For each
SCK clock pulse (t
HIGH
) while SI is HIGH, the selected
wiper moves one wiper position towards the R
H
terminal. Similarly, for each SCK clock pulse while SI is
LOW, the selected wiper moves one wiper position
towards the R
L
terminal. A detailed illustration of the
sequence and timing for this operation are shown. See
Instruction format for more details.
相關(guān)PDF資料
PDF描述
X9251US24I-2.7 Triac; Thyristor Type:Snubberless; Peak Repetitive Off-State Voltage, Vdrm:1000V; On State RMS Current, IT(rms):12A; Gate Trigger Current (QI), Igt:50mA; Current, It av:12A; Gate Trigger Current Max, Igt:50mA RoHS Compliant: Yes
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