參數(shù)資料
型號: X9250US24
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: 391A True RMS DMM with Test Lead Set RoHS Compliant: NA
中文描述: QUAD 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 0.300 INCH, PLASTIC, MS-013AD, SOIC-24
文件頁數(shù): 3/21頁
文件大?。?/td> 181K
代理商: X9250US24
X9250
Characteristics subject to change without notice.
3 of 21
REV 1.1.5 1/31/03
www.xicor.com
PIN NAMES
DEVICE DESCRIPTION
Serial Interface
The X9250 supports the SPI interface hardware
conventions. The device is accessed via the SI input
with data clocked in on the rising SCK. CS must be
LOW and the HOLD and WP pins must be HIGH
during the entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
Array Description
The X9250 is comprised of four resistor arrays. Each
array contains 255 discrete resistive segments that are
connected in series. The physical ends of each array
are equivalent to the fixed terminals of a mechanical
potentiometer (V
H
/R
H
and V
L
/R
L
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(V
W
/R
W
) output. Within each individual array only one
switch may be turned on at a time.
These switches are controlled by a Wiper Counter
Register (WCR). The 8 bits of the WCR are decoded
to select, and enable, one of 256 switches.
Wiper Counter Register (WCR)
The X9250 contains four Wiper Counter Registers,
one for each XDCP potentiometer. The WCR is
equivalent to a serial-in, parallel-out register/counter
with its outputs decoded to select one of 256 switches
along its resistor array. The contents of the WCR can
be altered in four ways: it may be written directly by the
host via the write Wiper Counter Register instruction
(serial load); it may be written indirectly by transferring
the contents of one of four associated Data Registers
via the XFR Data Register or Global XFR Data
Register instructions (parallel load); it can be modified
one step at a time by the increment/decrement
instruction. Finally, it is loaded with the contents of its
Data Register zero (DR0) upon power-up.
The Wiper Counter Register is a volatile register; that
is, its contents are lost when the X9250 is powered-
down. Although the register is automatically loaded
with the value in R0 upon power-up, this may be
different from the value present at power-down.
Data Registers
Each potentiometer has four 8-bit nonvolatile Data
Registers. These can be read or written directly by the
host. Data can also be transferred between any of the
four Data Registers and the associated Wiper Counter
Register. All operations changing data in one of the
Data Registers is a nonvolatile operation and will take
a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can
be used as regular memory locations for system
parameters or user preference data.
Data Register Detail
Symbol
Description
SCK
SI, SO
A
0
-A
1
V
H0
/R
H0–
V
H3
/R
H3
,
V
L0
/R
L0–
V
L3
/R
L3
V
W0
/R
W0–
V
W3
/R
W3
Serial Clock
Serial Data
Device Address
Potentiometer Pins
(terminal equivalent)
Potentiometer Pins
(wiper equivalent)
Hardware Write Protection
Analog Supplies
System Supply Voltage
System Ground
No Connection
WP
V+,V-
V
CC
V
SS
NC
(MSB)
D7
NV
(LSB)
D0
NV
D6
NV
D5
NV
D4
NV
D3
NV
D2
NV
D1
NV
相關(guān)PDF資料
PDF描述
X9250US24-2.7 BK Precision Function Generators, Display: 6 Digit .36 Red LED, Gate Time: Auto Select .25-10 sec, Resolution: .001 Hz, Attenuation: 0, -26 dB, Time Base: 20 MHz ( PPM), Frequency Range: .2 Hz-60 MHz, Sensitivity: 25 mV RMS
X9250US24I FUNCTION GENERATOR 2MHZ
X9250US24I-2.7 Function Generator; Bandwidth Max:5MHz; Certificate of Calibration:Yes With Data RoHS Compliant: NA
X9250 Low Noise/Low Power/SPI Bus/256 Taps
X9250-2.7 Low Noise/Low Power/SPI Bus/256 Taps
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