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參數(shù)資料
| 型號(hào)： | X9250TS24IZ-2.7T1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 0K |
| 描述： | IC XDCP QUAD 256TP 100K 24-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC |
| 包裝： | 帶卷 (TR) |
1
X9250
Low Noise/Low Power/SPI Bus/256 Taps
Quad Digitally Controlled Potentiometers
(XDCP)
FEATURES
Four potentiometers in one package
256 resistor taps/pot - 0.4% resolution
SPI serial interface
Wiper resistance, 40
typical @ VCC = 5V
Four nonvolatile data registers for each pot
Nonvolatile storage of wiper position
Standby current < 5A max (total package)
Power supplies
—VCC = 2.7V to 5.5V
—V+ = 2.7V to 5.5V
—V– = -2.7V to -5.5V
100k
, 50k total pot resistance
High reliability
—Endurance – 100,000 data changes per bit per
register
—Register data retention - 100 years
24 Ld SOIC, 24 Ld TSSOP
Dual supply version of X9251
Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The
X9250
integrates
4
digitally
controlled
potentiometers (XDCP) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
SPI bus interface. Each potentiometer has associated
with it a volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array though the switches. Power up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
VH1/RH1
VL1/RL1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Interface
and
Control
Circuitry
CS
SCK
A0
A1
VH0/RH0
VL0/RL0
Data
8
VW0/RW0
VW1/RW1
SO
SI
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 3
VH3/RH3
VL3/RH3
VW3/RW3
Pot1
HOLD
WP
Pot 0
VCC
VSS
V+
V-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Data Sheet
FN8165.3
August 29, 2006
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