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參數(shù)資料
| 型號(hào)： | X9250 |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Quad Digitally Controlled Potentiometers (XDCP) |
| 中文描述： | 四重?cái)?shù)控電位器（數(shù)字電位器） |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 181K |
| 代理商： | X9250 |
X9250
Characteristics subject to change without notice.
11 of 21
REV 1.1.5 1/31/03
www.xicor.com
D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER UP AND DOWN REQUIREMENT
The are no restrictions on the sequencing of the bias supplies V
CC
, V+, and V- provided that all three supplies reach
their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less than
V+ and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies reach
their final value. The V
CC
ramp rate spec is always in effect.
Notes:
(5) This parameter is periodically sampled and not 100% tested
(6) t
PUR
and t
PUW
are the delays required from the time the third (last) power supply (V
CC
, V+ or V-) is stable until the specific instruction can
be issued. These parameters are periodically sampled and not 100% tested.
(7) Sample tested only.
Symbol
I
CC1
Parameter
Limits
Test Conditions
Min.
Typ.
Max.
400
Unit
μA
V
CC
supply current
(active)
V
CC
supply current
(nonvolatile write)
V
CC
current (standby)
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
f
SCK
= 2MHz, SO = Open,
Other Inputs = V
SS
f
SCK
= 2MHz, SO = Open,
Other Inputs = V
SS
SCK = SI = V
SS
, Addr. = V
SS
V
IN
= V
SS
to V
CC
V
OUT
= V
SS
to V
CC
I
CC2
1
mA
I
SB
I
LI
I
LO
V
IH
V
IL
V
OL
5
10
10
μA
μA
μA
V
V
V
V
CC
x 0.7
–0.5
V
CC
+ 0.1
V
CC
x 0.3
0.4
I
OL
= 3mA
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Unit
Data changes per bit per register
Years
Symbol
C
OUT
(5)
C
IN
(5)
Test
Max.
8
6
Unit
pF
pF
Test Conditions
V
OUT
= 0V
V
IN
= 0V
Output capacitance (SO)
Input capacitance (A0, A1, SI, and SCK, CS)
Symbol
t
PUR
(6)
t
PUW
(6)
t
R
V
CC
(7)
Parameter
Min.
Max.
1
5
50
Unit
ms
ms
V/msec
Power-up to initiation of read operation
Power-up to initiation of write operation
V
CC
power up ramp rate
0.2
A.C. TEST CONDITIONS
I
nput pulse levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9250TB24 | Quad Digitally Controlled Potentiometers (XDCP) |
| X9250TB24-2.7 | Quad Digitally Controlled Potentiometers (XDCP) |
| X9250TB24I | Quad Digitally Controlled Potentiometers (XDCP) |
| X9250TB24I-2.7 | Quad Digitally Controlled Potentiometers (XDCP) |
| X9250TS24 | Quad Digitally Controlled Potentiometers (XDCP) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9250_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Digitally Controlled Potentiometers |
| X9250-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Noise/Low Power/SPI Bus/256 Taps |
| X9250TB24 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Quad Digitally Controlled Potentiometers (XDCP) |
| X9250TB24-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Quad Digitally Controlled Potentiometers (XDCP) |
| X9250TB24I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Quad Digitally Controlled Potentiometers (XDCP) |
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