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參數(shù)資料
| 型號： | X9241AMSIZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/16頁 |
| 文件大小： | 0K |
| 描述： | IC XDCP QUAD 2/10/10/50K 20-S |
| 標(biāo)準(zhǔn)包裝： | 35 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 2k，10k，10k，50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 管件 |
9
FN8164.6
August 31, 2007
Cascade Mode
The X9241A provides a mechanism for cascading the
arrays. That is, the sixty-three resistor elements of one array
may be cascaded (linked) with the resistor elements of an
adjacent array. The VL/RL of the higher order array must be
connected to the VH/RH of the lower order array (See
Figure 9).
Cascade Control Bits
The data byte, for the three-byte commands, contains 6-bits
(LSBs) for defining the wiper position plus 2 high order bits,
CM (Cascade Mode) and DW (Disable Wiper, normal
operation).
The state of the CM bit (bit 7 of WCR) enables or disables
cascade mode. When the CM bit of the WCR is set to “0” the
potentiometer is in the normal operation mode. When the
CM bit of the WCR is set to “1” the potentiometer is
cascaded with its adjacent higher order potentiometer. For
example; if bit 7 of WCR2 is set to “1”, pot 2 will be cascaded
to pot 3.
The state of DW enables or disables the wiper. When the
DW bit (bit 6 of the WCR) is set to “0” the wiper is enabled;
when set to “1” the wiper is disabled. If the wiper is disabled,
the wiper terminal will be electrically isolated and float.
When operating in cascade mode VH/RH, VL/RL and the
wiper terminals of the cascaded arrays must be electrically
connected externally. All but one of the wipers must be
disabled. The user can alter the wiper position by writing
directly to the WCR or indirectly by transferring the contents
of the Data Registers to the WCR or by using the
Increment/Decrement command.
When using the Increment/Decrement command the wiper
position will automatically transition between arrays. The
current position of the wiper can be determined by reading
the WCR registers; if the DW bit is “0”, the wiper in that array
is active. If the current wiper position is to be maintained on
power-down a global XFR WCR to Data Register command
must be issued to store the position in NV memory before
power-down.
It is possible to connect three or all four potentiometers in
cascade mode. It is also possible to connect POT 3 to POT 0
as a cascade. The requirements for external connections of
VL/RL, VH/RH and the wipers are the same in these cases.
VH0/RH0
VL0/RL0
VW0/RW0
VL1/RL1
VH1/RH1
VW1/RW1
VL2/RL2
VH2/RH2
VW2/RW2
VL3/RL3
VH3/RH3
VW3/RW3
POT 0
WCR0
POT 1
WCR1
POT 2
WCR2
POT 3
WCR3
EXTERNAL
CONNECTION
=
FIGURE 9. CASCADING ARRAYS
X9241A
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| X9241AMSIZT1 | 功能描述:IC XDCP QUAD 2/10/10/50K 20-S RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9241AMST1 | 功能描述:IC XDCP QUAD 2/10/10/50K 20-S RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9241AMSZ | 功能描述:IC XDCP QUAD 2/10/10/50K 20-S RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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