
1
FN8161.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9118
Dual Supply/Low Power/1024-Tap/2-Wire Bus
Single Digitally-Controlled (XDCP)
Potentiometer
The X9118 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS integrated
circuit.
The digital controlled potentiometer is implemented using
1023 resistive elements in a series array. Between each
element are tap points connected to the wiper terminal
through switches. The position of the wiper on the array is
controlled by the user through the 2-wire bus interface. The
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and a four non-volatile Data Registers that
can be directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the resistor
array though the switches. Power-up recalls the contents of
the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
1024 Resistor Taps – 10-Bit Resolution
2-Wire Serial Interface for Write, Read and Transfer
Operations of the Potentiometer
Wiper Resistance, 40
Ω Typical @ 5V
Four Non-Volatile Data Registers for Each Potentiometer
Non-Volatile Storage of Multiple Wiper Positions
Power On Recall: Loads Saved Wiper Position on
Power-Up
Standby Current < 15A Max
System VCC: 2.7V to 5.5V Operation
Analog V+/V-: -5V to +5V
100k
Ω End to End Resistance
Endurance: 100,000 Data Changes Per Bit Per Register
100 yr. Data Retention
14 Ld TSSOP
Low Power CMOS
Pb-Free Available (RoHS Compliant)
Ordering Information
PART NUMBER
PART
MARKING
VCC LIMITS
(V)
POTENTIOMETER
ORGANIZATION
(k
Ω)
TEMP RANGE
(°C)
PACKAGE
PKG.
DWG. #
X9118TV14
X9118 TV
5 ±10%
100
0 to +70
14 Ld TSSOP
M14.173
X9118 TVZ
0 to +70
14 Ld TSSOP (Pb-free)
M14.173
X9118 TVI
-40 to +85
14 Ld TSSOP
M14.173
X9118 TVZI
-40 to +85
14 Ld TSSOP (Pb-free)
M14.173
X9118 TVF
2.7 to 5.5
0 to +70
14 Ld TSSOP
M14.173
X9118TV14Z-2.7 (Note
1) X9118 TVZF
0 to +70
14 Ld TSSOP (Pb-free)
M14.173
X9118 TVG
-40 to +85
14 Ld TSSOP
M14.173
X9118TV14IZ-2.7 (Note
1) X9118 TVZG
-40 to +85
14 Ld TSSOP (Pb-free)
M14.173
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
2. Not recommended for new designs.
Data Sheet
December 4, 2009