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| 型號(hào)： | X86-64 |
| 英文描述： | x86-64 - Advanced Micro Devices. Inc. x86-64TM Technology White Paper |
| 中文描述： | 86 - 64 -高級(jí)微設(shè)備公司。公司86 - 64TM技術(shù)白皮書(shū) |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 512K |
| 代理商： | X86-64 |
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T E C H N O L O G Y W H IT E P A P E R
Page 9
Register Extensions
To define the addressing logic for the registers, the AMD x86-64 architecture simply extends the
addressing scheme currently used for 16- and 32-bit instructions. For example, as shown in the
diagram below:
For 16-bit operations, the two bytes of Register A are addresses as AX
For 32-bitoperations, the four bytes of Register A are addressed as EAX
For 64-bitoperations, the eight bytes of Register A are addressed as RAX
In 64-bit Mode, General Purpose Registers (GPRs) are extended to 64-bits. The 64-bit registers
are called RAX, RBX, RCX, RDX, RDI, RSI, RBP, RSP, RIP and RFLAGS. The new 64-bit
registers overlay and extend the existing registers. In addition, eight new 64-bit GPRs are added
for a total of 16 GPRS. The new GPRs are called R8 through R15.
The register extensions also add eight new streaming SIMD registers for a total of 16 SIMD
registers. The new SIMD registers are called XMM8 through XMM15.
Segment registers (ES, DS, FS, GS and SS) are ignored in 64-bit Mode. Code segments still exist
in 64-bit Mode. The CS is needed to encapsulate the default mode of the processor (16-, 32- or
64-bit mode) as well as the execution privilege level. As noted above, the D bit and L bit are
used to specify the default address and operand sizes. The DPL is used for execution privilege
checks. Base and limit fields are ignored.
When performing 32-bit operations and the destination register is a GPR, the 32-bit value will be
zero-extended into the full 64-bit GPR. 8-bit and 16-bit operations on GPRs preserve all
unwritten upper bits. This preserves the 16- and 32-bit semantics for partial-width results.
The final step is to simply define a set of instruction prefixes that specify a 64-bit operand size
and allow access to the new registers. This is similar to the method used to extend the x86
architecture for other functionality, such as AMD's 3DNow! technology. With this strategy,
AMD makes it possible for platform suppliers, developers, and other users to use existing
toolsets, applications, and knowledge, while providing a smooth migration to 64-bit enabled
applications as hardware and software support becomes available.
Compatibility Mode
Compatibility mode allows operating systems to implement binary compatibility with existing
16-bit and 32-bit x86 applications. It allows these applications to run, without recompilation,
under a 64-bit operating system in long mode. In compatibility mode, applications can only
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| X88064 | E2 Micro-Peripheral |
| X88064P | E2 Micro-Peripheral |
| X88064P-60 | E2 Micro-Peripheral |
| X88064PI | E2 Micro-Peripheral |
| X88064PI-60 | E2 Micro-Peripheral |
相關(guān)代理商/技術(shù)參數(shù) |
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| X86C64 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E2 Micro-Peripheral |
| X86C64P | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E2 Micro-Peripheral |
| X86C64PI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E2 Micro-Peripheral |
| X86C64PM | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E2 Micro-Peripheral |
| X86C64S | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E2 Micro-Peripheral |
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