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參數(shù)資料
| 型號： | X84256ZI-1.8 |
| 元件分類： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 68K |
| 代理商： | X84256ZI-1.8 |
Preliminary
4005 1 8/24/99 WW
Xicor, Inc. 1998 Patents Pending
1
Characteristics subject to change without notice
256K
MPS
EEPROM
μPort Saver EEPROM
FEATURES
Up to 10MHz data transfer rate
25ns Read Access Time
Direct Interface to Microprocessors and
Microcontrollers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
Low Power CMOS
—2.5V–5.5V and 5V ±10% Versions
—Standby Current Less than 1μA
—Active Current Less than 3mA
Byte or Page Write Capable
—64-Byte Page Write Mode
Typical Nonvolatile Write Cycle Time: 2ms
High Reliability
—1,000,000 Endurance Cycles
—Guaranteed Data Retention: 100 Years
Small Packages Options
—8, 16-Lead SOIC Packages
—14-Lead TSSOP Packages
—8-Lead XBGA Packages
DESCRIPTION
The μPort Saver memories need no serial ports or spe-
cial hardware and connect to the processor memory bus.
Replacing bytewide data memory, the μPort Saver uses
bytewide memory control functions, takes a fraction of
the board space and consumes much less power.
Replacing serial memories, the μPort Saver provides all
the serial benefits, such as low cost, low power, low volt-
age, and small package size while releasing I/Os for
more important uses.
The μPort Saver memory outputs data within 25ns of an
active read signal. This is less than the read access time
of most hosts and provides “no-wait-state” operation.
This prevents bottlenecks on the bus. With rates to 10
MHz, the μPort Saver supplies data faster than required
by most host read cycle specifications. This eliminates
the need for software NOPs.
The μPort Saver memories communicate over one line
of the data bus using a sequence of standard bus read
and write operations. This “bit serial” interface allows the
μPort Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit
systems.
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data reten-
tion is greater than 100 years.
BLOCK DIAGRAM
CE
I/O
H.V. GENERATION
TIMING & CONTROL
EEPROM
ARRAY
COMMAND
DECODE
AND
CONTROL
LOGIC
X
DEC
Y DECODE
DATA REGISTER
WP
OE
WE
32K x 8
P0/CS
P1/CLK
P2/DI
P3/DO
System Connection
Internal Block Diagram
MPS
μP
μC
DSP
ASIC
RISC
Ports
Saved
A15
A0
D7
D0
OE
WE
X84256
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