參數(shù)資料
型號(hào): X8037QC
廠商: Abracon Corporation
元件分類(lèi): 振蕩器
英文描述: 38-640MHz Low Phase Noise XO
中文描述: 38-640MHz低相位噪聲振蕩器
文件頁(yè)數(shù): 2/10頁(yè)
文件大小: 224K
代理商: X8037QC
(Preliminary)
ABX8037/38/39
38-640MHz Low Phase Noise XO
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001
www.Abracon.com
9/1/05 Page 2
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
State
0 (Default)
1
0
1 (Default)
Output enabled
Tri-state
Tri-state
Output enabled
ABX8038 (PECL)
ABX8037 & 39 (CMOS or LVDS)
PIN DESCRIPTIONS
Name
TSSOP
Pin number
1
2
3
4
3x3mm QFN
Pin number
11
12
13
14
Type
Description
VDDANA
XIN
XOUT
SEL2
P
I
O
I
VDD for analog Circuitry.
Crystal input pin. (See Crystal Specifications on page 3).
Crystal output pin. (See Crystal Specifications on page 3).
Output frequency Selector pin.
Output enable control pin. (See OE_CTRL Logic Levels on page
1).
Do Not Connect
Ground for analog circuitry.
Tuning inductor connection. The inductor is recommended to be
a high Q small size 0402 or 0603 SMD component, and must be
placed between LP and adjacent LM pin. Place inductor as close
to the IC as possible to minimize parasitic effects and to
maintain inductor Q.
GND connection for output buffer circuitry.
PECL or LVDS output.
VDD connection for output buffer circuitry. VDDBUF should be
separately decoupled from other VDDs whenever possible.
Complementary PECL, LVDS output; Or single ended CMOS
output.
GND connection for output buffer circuitry.
Output frequency Selector pin.
Output frequency Selector pin.
OE_CTRL
5
15
I
DNC
GNDANA
6
7
16
1
-
P
LP
8
2
-
LM
9
3
-
GNDBUF
Q
10
11
4
5
P
O
VDDBUF
12
6
P
QBAR
13
7
O
GNDBUF
SEL1
SEL0
14
15
16
8
9
10
P
I
I
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