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參數(shù)資料
| 型號： | X80120 |
| 英文描述： | Voltage Supervisor/Sequencer Dual Programmable Time Delay with Local/Remote Voltage Monitors(帶當?shù)?遠程電壓監(jiān)控功能的電源順序管理器) |
| 中文描述： | 電壓監(jiān)控/雙可編程序時滯與本地/遠程電壓監(jiān)測器（帶當?shù)?遠程電壓監(jiān)控功能的電源順序管理器） |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 57K |
| 代理商： | X80120 |
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REV 1.1.2 7/28/03
Application Note
Power Sequencing in Distributed Power Applications:
Sequenced Turn-on of Seven DC/DC Power Supplies with
Latched Shutdown
Carlos Martinez, July 2003
It is becoming more common today to see many different
power supplies in a system. There can be from 3 to 7 or
more different DC/DC controllers. This is typically the
result of the proliferation of new microprocessors, ASICs
and FPGAs, each with their own variety of power supply
voltages and power sequencing components.
In this application (see Figure 2 and Figure 3) two
X80140 quad sequencers are used to sequence seven
DC/DC converters. The X80140 devices monitor the out-
put of each DC/DC converter. After the supply reaches a
minimum operating level, the X80140 powers up the next
supply after a fixed delay. When all supplies have
reached their proper level, the RESET outputs go inac-
tive (HIGH).
Because of the way the voltage monitors are configured,
the failure of any one supply causes either of the two
reset outputs to go become active. This triggers the latch,
which pulls the MR pin on both devices LOW, thus turn-
ing off all supplies. To allow resequencing requires a sep-
arate reset signal or the main supply to be cycled off,
then on.
The X80140 provides a selectable delay for each supply.
The options are 100ms, 500ms, 1s, and 5s. Sequencing
seven supplies requires a minimum of 700ms (plus the
turn on time for each supply.) The eighth voltage monitor
in the circuit is used as a watchdog timer (WDT). This
timer starts when the master (first) voltage is applied. For
the circuit to work, the timer is set to 1 second or 5 sec-
onds. If the WDT (ViGDO) output goes active before all
of the supplies have reached their proper level, then one
or both of the RESET outputs will be active. In this event,
the latch is clocked and the MR pins are pulled HIGH,
turning off all supplies. With the WDT set to 5 seconds
there is some flexibility in the individual turn on delays.
With the WDT set to 1 second, all delay times will likely
need to be set to 100ms.
AN166
Figure 1. X80140 Block Diagram
MR
V1MON
V2MON
V3MON
V4MON
V4GDO
V3GDO
V2GDO
V1GDO
A1
A0
WP
SCL
SDA
RESET
V
P
EEPROM
2kbits
VMON Logic
V
CC
B
V
SS
V
SS
V
REF1
V
REF2
V
REF3
V
REF4
POR
Control and
Fault
Registers
V
SS
Divider
Reset
Reset Logic
and Delay
V
SS
4
OSC
0.1s
0.5s
1s
5s
Select
4
delay1
delay2
delay3
delay4
Delay circuit
repeated 4 times
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X80120Q20I | 制造商:Intersil Corporation 功能描述:Voltage Supervisor/Sequencer Dual Programmable Time Delay with Local/Remote Voltage Monitors |
| X80121 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Voltage Supervisor/Sequencer Dual Programmable Time Delay with Local/Remote Voltage Monitors |
| X80121Q20I | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Voltage Supervisor/Sequencer Dual Programmable Time Delay with Local/Remote Voltage Monitors |
| X80130 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Voltage Supervisor/Sequencer Triple Programmable Time Delay with Local/Remote Voltage Monitors |
| X80130Q20I | 制造商:Intersil Corporation 功能描述:Voltage Supervisor/Sequencer Triple Programmable Time Delay with Local/Remote Voltage Monitors |
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