參數(shù)資料
型號: X5083V8IZ-2.7
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: RTC Module With CPU Supervisor
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝: ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
文件頁數(shù): 13/21頁
文件大?。?/td> 115K
代理商: X5083V8IZ-2.7
X5083
Characteristics subject to change without notice.
13 of 21
REV 1.1.6 6/25/02
www.xicor.com
POWER-UP TIMING
CAPACITANCE
T
A
= +25°C, f = 1MHz, V
CC
= 5V.
Notes:
(1) V
IL
min. and V
IH
max. are for reference only and are not tested.
(2) This parameter is periodically sampled and not 100% tested.
Symbol
t
PUR
(2)
t
PUW
(2)
Parameter
Min.
Max.
1
5
Unit
ms
ms
Power-up to read operation
Power-up to write operation
Symbol
C
OUT
(2)
C
IN
(2)
Test
Max.
8
6
Unit
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
Output capacitance (SO, RESET, RESET)
Input capacitance (SCK, SI, CS, WP)
EQUIVALENT A.C. LOAD CIRCUIT AT 5V V
CC
A.C. TEST CONDITIONS
5V
SO
100pF
5V
3.3K
RESET
30pF
1.64K
1.64K
Output
Input pulse levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x0.5
A.C. CHARACTERISTICS
(Over recommended operating conditions, unless otherwise specified)
Data Input Timing
Symbol
f
SCK
t
CYC
t
LEAD
t
LAG
t
WH
t
WL
t
SU
t
H
t
RI
(3)
t
FI
(3)
t
CS
t
WC
(4)
Parameter
2.7V–5.5V
Min.
0
300
150
150
130
130
20
20
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ms
Max.
3.3
Clock frequency
Cycle time
CS lead time
CS lag time
Clock HIGH time
Clock LOW time
Data setup time
Data hold time
Input rise time
Input fall time
CS deselect time
Write cycle time
2
2
100
10
相關(guān)PDF資料
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X5083 RTC Module With CPU Supervisor
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