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參數資料
| 型號： | X5083S8Z-2.7A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | RTC Module With CPU Supervisor |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | ROHS COMPLIANT, SOIC-8 |
| 文件頁數： | 2/21頁 |
| 文件大?。?/td> | 115K |
| 代理商： | X5083S8Z-2.7A |
X5083
Characteristics subject to change without notice.
2 of 21
REV 1.1.6 6/25/02
www.xicor.com
DESCRIPTION
This device combines four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Super-
vision, and Block Lock Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET active for a period of
time. This allows the power supply and oscillator to sta-
bilize before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval,
the device activates the RESET signal. The user selects
the interval from three preset values. Once selected, the
interval does not change, even after cycling the power.
The device’s low V
user’s system from low voltage conditions, resetting
the system when V
CC
falls below the minimum V
point. RESET is asserted until V
proper operating level and stabilizes. Five industry
standard V
TRIP
thresholds are available, however, Xicor’s
unique circuits allow the threshold to be reprogrammed to
meet custom requirements or to fine-tune the threshold
for applications requiring higher precision.
CC
detection circuitry protects the
CC
trip
CC
returns to the
PIN CONFIGURATION
PIN DESCRIPTION
Pin
(SOIC/
PDIP)
1
Pin
TSSOP
3
Name
CS/WDI
Function
Chip Select Input.
impedance state. Unless a nonvolatile write cycle is underway, the device will be in the standby
power mode. CS LOW enables the device, placing it in the active power mode. Prior to the
start of any operation after power up, a HIGH to LOW transition on CS is required.
Watchdog Input.
A HIGH to LOW transition on the WDI pin restarts the Watchdog timer. The
absence of a HIGH to LOW transition within the watchdog time out period results in RESET
going active.
Serial Output.
SO is a push/pull serial data output pin. A read cycle shifts data out on this pin. The
falling edge of the serial clock (SCK) clocks the data out.
Serial Input.
SI is a serial data input pin. Input all opcodes, byte addresses, and memory data
on this pin. The rising edge of the serial clock (SCK) latches the input data. Send all opcodes
(Table 1), addresses and data MSB first.
Serial Clock.
The Serial Clock controls the serial bus timing for data input and output. The rising
edge of SCK latches in the opcode, address, or data bits present on the SI pin. The falling edge of
SCK changes the data output on the SO pin.
Write Protect.
When WP is LOW, nonvolatile write operations to the memory are prohibited.
This “Locks” the memory to protect it against inadvertent changes when WP is HIGH, the
device operates normally.
Ground
Supply Voltage
Reset Output
. RESET is an active LOW, open drain output which goes active whenever V
falls below the minimum V
CC
sense level. It will remain active until V
minimum V
CC
sense level for 250ms. RESET goes active if the watchdog timer is enabled and
CS remains either HIGH or LOW longer than the selectable watchdog time out period.
A falling edge of CS will reset the watchdog timer. RESET goes active on power up at about
1V and remains active for 250ms after the power supply stabilizes.
CS HIGH, deselects the device and the SO output pin is at a high
2
4
SO
5
7
SI
6
8
SCK
3
5
WP
4
8
7
6
2
1
V
V
SS
CC
RESET
CC
CC
rises above the
SCK
SI
V
SS
WP
V
CC
CS/WDI
SO
1
2
3
4
8
7
6
5
8-Lead TSSOP
X5083
RESET
8-Lead SOIC, PDIP
X5083
CS/WDI
WP
V
SS
SO
1
2
3
4
RESET
SCK
SI
8
7
6
5
V
CC
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| X5083S8Z-4.5A | 功能描述:IC CPU SUPERV 8K EEPROM 8-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數目:1 輸出:開路漏極或開路集電極 復位:低有效 復位超時:最小為 600 ms 電壓 - 閥值:3.8V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應商設備封裝:SOT-23-5 包裝:帶卷 (TR) |
| X5083SI | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CPU Supervisor with 9Kbit SPI EEPROM |
| X5083V8 | 功能描述:IC SUPERVISOR CPU 8K EE 8-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5083V8-1.8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SPI Serial EEPROM with Supervisory Features |
| X5083V8-2.7 | 功能描述:IC SUPERVISOR CPU 8K EE 8-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
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