參數(shù)資料
型號: X5043V14I-2.7A
元件分類: CPU監(jiān)測
英文描述: RTC Module With CPU Supervisor
中文描述: 時鐘模塊CPU監(jiān)控
文件頁數(shù): 11/20頁
文件大?。?/td> 108K
代理商: X5043V14I-2.7A
X5043/X5045
Characteristics subject to change without notice.
11 of 20
REV 1.1.2 5/29/01
www.xicor.com
Equivalent A.C. Load Circuit at 5V V
CC
A.C. Test Conditions
5V
Output
30pF
5V
4.6K
RESET/RESET
30pF
1.64K
1.64K
Input pulse levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x0.5
A.C. CHARACTERISTICS
(Over recommended operating conditions, unless otherwise specified)
Data Input Timing
Data Output Timing
Notes:
(3) This parameter is periodically sampled and not 100% tested.
(4) t
WC
is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile
write cycle.
Symbol
f
SCK
t
CYC
t
LEAD
t
LAG
t
WH
t
WL
t
SU
t
H
t
RI
(3)
t
FI
(3)
t
CS
t
WC
(4)
Parameter
2.7V–5.5V
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ms
Min.
0
300
150
150
130
130
30
30
Max.
3.3
Clock Frequency
Cycle Time
CS Lead Time
CS Lag Time
Clock HIGH Time
Clock LOW Time
Data Setup Time
Data Hold Time
Input Rise Time
Input Fall Time
CS Deselect Time
Write Cycle Time
2
2
100
10
Symbol
f
SCK
t
DIS
t
V
t
HO
t
RO
(3)
t
FO
(3)
Parameter
2.7–5.5V
Unit
MHz
ns
ns
ns
ns
ns
Min.
0
Max.
3.3
150
120
Clock Frequency
Output Disable Time
Output Valid from Clock Low
Output Hold Time
Output Rise Time
Output Fall Time
0
50
50
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