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參數(shù)資料
| 型號： | X4283(中文) |
| 元件分類： | CPU監(jiān)測 |
| 英文描述： | RTC Module With CPU Supervisor |
| 中文描述： | 時鐘模塊CPU監(jiān)控 |
| 文件頁數(shù)： | 10/22頁 |
| 文件大?。?/td> | 403K |
| 代理商： | X4283(中文) |
X4283/85 – Preliminary Information
Characteristics subject to change without notice.
10 of 22
REV 1.17 11/27/00
www.xicor.com
Figure 10. Writing 12 bytes to a 64-byte page starting at location 60.
Address
n-1
Address
60
4 Bytes
8 Bytes
Address
= 7
Address Pointer
Ends Here
Addr =
8
The master terminates the Data Byte loading by issuing
a stop condition, which causes the device to begin the
nonvolatile write cycle. As with the byte write operation,
all inputs are disabled until completion of the internal
write cycle. See Figure 9 for the address, acknowledge,
and data transfer sequence.
Stops and Write Modes
Stop conditions that terminate write operations must be
sent by the master after sending at least 1 full data byte
plus the subsequent ACK signal. If a stop is issued in
the middle of a data byte, or before 1 full data byte plus
its associated ACK is sent, then the device will reset
itself without performing the write. The contents of the
array will not be effected.
Acknowledge Polling
The disabling of the inputs during nonvolatile cycles
can be used to take advantage of the typical 5ms write
cycle time. Once the stop condition is issued to indicate
the end of the master’s byte load operation, the device
initiates the internal nonvolatile cycle. Acknowledge
polling can be initiated immediately. To do this, the
master issues a start condition followed by the Slave
Address Byte for a write or read operation. If the device
is still busy with the nonvolatile cycle then no ACK will
be returned. If the device has completed the write oper-
ation, an ACK will be returned and the host can then
proceed with the read or write operation. Refer to the
flow chart in Figure 11.
Figure 11. Acknowledge Polling Sequence
ACK
returned
Issue Slave Address
Byte (Read or Write)
Byte Load Completed
by Issuing STOP.
Enter ACK Polling
Issue STOP
Issue START
NO
YES
Nonvolatile Cycle
Complete. Continue
Command Sequence
Issue STOP
NO
Continue Normal
Read or Write
Command Sequence
PROCEED
YES
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PDF描述 |
|---|---|
| X4283 | RTC Module With CPU Supervisor |
| X4323 | RTC Module With CPU Supervisor |
| X4325 | RTC Module With CPU Supervisor |
| X4643(中文) | RTC Module With CPU Supervisor |
| X4645(中文) | RTC Module With CPU Supervisor |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X4283_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CPU Supervisor with 128K EEPROM |
| X4283AL | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283AM | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283AN | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283AP | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
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