參數(shù)資料
型號: X40410S8-C
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor
中文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝: PLASTIC, SOIC-8
文件頁數(shù): 3/24頁
文件大小: 363K
代理商: X40410S8-C
3
FN8116.0
March 28, 2005
PRINCIPLES OF OPERATION
Power-On Reset
Application of power to the X40410/11/14/15 activates a
Power-on Reset Circuit that pulls the RESET/RESET
pins active. This signal provides several benefits.
– It prevents the system microprocessor from starting to
operate with insufficient voltage.
– It prevents the processor from operating prior to stabili-
zation of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power-up.
When V
CC
exceeds the device V
TRIP1
threshold value for
t
PURST
(selectable) the circuit releases the RESET
(X40411) and RESET (X40410) pin allowing the system
to begin operation.
Low Voltage V
CC
(V1 Monitoring)
During operation, the X40410/11/14/15 monitors the
V
CC
level and asserts RESET/RESET if supply voltage
falls
below
a
preset
RESET/RESET signal prevents the microprocessor
from operating in a power fail or brownout condition.
The V1FAIL signal remains active until the voltage
drops below 1V. It also remains active until V
CC
returns
and exceeds V
TRIP1
for
t
PURST
.
minimum
V
TRIP1
.
The
Low Voltage V2 Monitoring
The X40410/11/14/15 also monitors a second voltage
level and asserts V2FAIL if the voltage falls below a
preset minimum V
TRIP2
. The V2FAIL signal is either
ORed with RESET to prevent the microprocessor from
operating in a power fail or brownout condition or used to
interrupt the microprocessor with notification of an
impending power failure. For the X40410/11 the V2FAIL
signal remains active until the V
CC
drops below 1V (V
CC
falling). It also remains active until V2MON returns and
exceeds V
TRIP2
by 0.2V. This voltage sense circuitry
monitors the power supply connected to the V2MON pin.
If V
CC
= 0, V2MON can still be monitored.
For the X40414/15 devices, the V2FAIL signal remains
actice until V
CC
drops below 1Vx and remains active
until V2MON returns and exceeds V
TRIP2
. This sense
circuitry is powered by V
CC
. If V
CC
= 0, V2MON cannot
be monitored.
Figure 1. Two Uses of Multiple Voltage Monitoring
6
7
8
1
SCL
WDO
Serial Clock.
The Serial Clock controls the serial bus timing for data input and output.
WDO Output.
WDO is an active LOW, open drain output which goes active whenever the watch-
dog timer goes active.
Supply Voltage
8
2
V
CC
PIN DESCRIPTION
(Continued)
Pin
Name
Function
SOIC TSSOP
6–10V
V
CC
5V
Reg
V2MON
(2.9V)
X40411-A
Resistors selected so 3V appears on V2MON when unregulated
supply reaches 6V.
Unreg.
Supply
V
CC
X40414-C
RESET
V2FAIL
System
Reset
V
CC
RESET
V2FAIL
V
CC
System
Reset
Notice:
No external components required to monitor two voltages.
1M
1M
V2MON
3.3V
Reg
1.2V
Reg
V2MON
X40410, X40411, X40414, X40415
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