- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376439 > X40034S14IZ-B (INTERSIL CORP) Triple Voltage Monitor with Integrated CPU Supervisor PDF資料下載
參數(shù)資料
| 型號： | X40034S14IZ-B |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Triple Voltage Monitor with Integrated CPU Supervisor |
| 中文描述： | 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-14 |
| 文件頁數(shù)： | 15/24頁 |
| 文件大?。?/td> | 360K |
| 代理商： | X40034S14IZ-B |
15
FN8114.1
May 25, 2006
SERIAL DEVICE ADDRESSING
Slave Address Byte
Following a start condition, the master must output a
Slave Address Byte. This byte consists of several parts:
– a device type identifier that is always ‘1011’.
– one bit (AS) that provides the device select bit. AS
bit is set-to “0” as factory default.
– next bit is ‘0’.
Figure 12. X40030, X40031, X40034, X40035
Addressing
– last bit of the slave command byte is a R/W bit. The
R/W bit of the Slave Address Byte defines the oper-
ation to be performed. When the R/W bit is a one,
then a read operation is selected. A zero selects a
write operation.
Word Address
The word address is either supplied by the master or
obtained from an internal counter. The internal counter
is undefined on a power up condition.
Operational Notes
The device powers-up in the following state:
– The device is in the low power standby state.
– The WEL bit is set to ‘0’. In this state it is not possi-
ble to write to the device.
– SDA pin is the input mode.
– RESET/RESET Signal is active for
t
PURST
.
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
prior to the stop bit in order to start a nonvolatile
write cycle.
– A three step sequence is required before writing into
the Control Register to change Watchdog Timer or
Block Lock settings.
– The WP pin, when held HIGH, prevents all writes to
the array and all the Register.
Control Register
1
0
1
1
0
0
1
R/W
Slave Byte
1
0
1
1
0
0
0
R/W
Fault Detection Register
Control Register
1
1
1
1
1
1
1
1
Word Address
1
1
1
1
1
1
1
1
Fault Detection Register
X40030, X40031, X40034, X40035
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X40034S14Z-A | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034S14Z-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034V14-A | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034V14-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034V14-C | Triple Voltage Monitor with Integrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40034S14Z-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034S14Z-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034SA | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034SB | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034SC | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。