
2
X28HC64
PIN DESCRIPTIONS
Addresses (A
0
–A
12
)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (
CE
)
The Chip Enable input must be LOW to enable all read/
write operations. When
CE
is HIGH, power consumption
is reduced.
Output Enable (
OE
)
The Output Enable input controls the data output buffers
and is used to initiate read operations.
Data In/Data Out (I/O
0
–I/O
7
)
Data is written to or read from the X28HC64 through the
I/O pins.
Write Enable (
WE
)
The Write Enable input controls the writing of data to the
X28HC64.
PIN NAMES
Symbol
A
0
–A
12
I/O
0
–I/O
7
WE
CE
OE
V
CC
V
SS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
3857 PGM T01
3857 FHD F01
X BUFFERS
LATCHES AND
DECODER
I/O BUFFERS
AND LATCHES
Y BUFFERS
LATCHES AND
DECODER
CONTROL
LOGIC AND
TIMING
65,536-BIT
E2PROM
ARRAY
I/O0–I/O7
DATA INPUTS/OUTPUTS
CE
OE
VCC
VSS
A0–A12
ADDRESS
INPUTS
WE
FUNCTIONAL DIAGRAM