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參數(shù)資料
| 型號： | X28HC64KI-70 |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | 5 Volt, Byte Alterable EEPROM |
| 中文描述： | 8K X 8 EEPROM 5V, 70 ns, CPGA28 |
| 封裝： | PGA-28 |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 112K |
| 代理商： | X28HC64KI-70 |
2
X28HC64
PIN DESCRIPTIONS
Addresses (A
0
–A
12
)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (
CE
)
The Chip Enable input must be LOW to enable all read/
write operations. When
CE
is HIGH, power consumption
is reduced.
Output Enable (
OE
)
The Output Enable input controls the data output buffers
and is used to initiate read operations.
Data In/Data Out (I/O
0
–I/O
7
)
Data is written to or read from the X28HC64 through the
I/O pins.
Write Enable (
WE
)
The Write Enable input controls the writing of data to the
X28HC64.
PIN NAMES
Symbol
A
0
–A
12
I/O
0
–I/O
7
WE
CE
OE
V
CC
V
SS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
3857 PGM T01
3857 FHD F01
X BUFFERS
LATCHES AND
DECODER
I/O BUFFERS
AND LATCHES
Y BUFFERS
LATCHES AND
DECODER
CONTROL
LOGIC AND
TIMING
65,536-BIT
E2PROM
ARRAY
I/O0–I/O7
DATA INPUTS/OUTPUTS
CE
OE
VCC
VSS
A0–A12
ADDRESS
INPUTS
WE
FUNCTIONAL DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X28HC64KI-90 | 5 Volt, Byte Alterable EEPROM |
| X28HC64KM-12 | 5 Volt, Byte Alterable EEPROM |
| X28HC64KM-70 | 5 Volt, Byte Alterable EEPROM |
| X28HC64PI-12 | 5 Volt, Byte Alterable EEPROM |
| X28HC64PM-12 | 5 Volt, Byte Alterable EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X28HC64KI-90 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
| X28HC64KM-12 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
| X28HC64KM-50 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5 Volt, Byte Alterable E2PROM |
| X28HC64KM-55 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| X28HC64KM-70 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
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