參數(shù)資料
型號(hào)： X28HC64JMB-70
廠商： INTERSIL CORP
元件分類： DRAM
英文描述： 5 Volt, Byte Alterable EEPROM
中文描述： 8K X 8 EEPROM 5V, 70 ns, PQCC32
封裝： PLASTIC, LCC-32
文件頁(yè)數(shù)： 1/24頁(yè)
文件大?。?/td> 112K
代理商： X28HC64JMB-70
X28HC64
1
64K
X28HC64
8K x 8 Bit
5 Volt, Byte Alterable E
2
PROM
Xicor, Inc. 1994, 1995, 1996 Patents Pending
3857-3.0 8/5/97 T1/C0/D0 EW
Characteristics subject to change without notice
FEATURES
55ns Access Time
Simple Byte and Page Write
—Single 5V Supply
—No External High Voltages or V
PP
Control
Circuits
—Self-Timed
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Low Power CMOS
—40 mA Active Current Max.
—200
μ
A Standby Current Max.
Fast Write Cycle Times
—64 Byte Page Write Operation
—Byte or Page Write Cycle: 2ms Typical
—Complete Memory Rewrite: 0.25 sec. Typical
—Effective Byte Write Cycle Time: 32
μ
s Typical
Software Data Protection
End of Write Detection
—
DATA
Polling
—Toggle Bit
PIN CONFIGURATIONS
3857 FHD F03
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
4
3
2
1 32 31 30
14 15 16 17 18 19 20
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
X28HC64
LCC
PLCC
A7
A1
N
N
VC
W
N
I1
I2
VS
N
I3
I4
I5
3857 ILL F22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
X28HC64
A3
A4
A5
A6
A7
A12
NC
VCC
WE
NC
A8
A9
A11
OE
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A2
A1
A0
I/O0
I/O1
INC
NC
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
TSOP
3857 FHD F02.1
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
NC
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/04
I/O3
X28HC64
PLASTIC DIP
FLAT PACK
CERDIP
SOIC
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
JEDEC Approved Byte-Wide Pinout
DESCRIPTION
The X28HC64 is an 8K x 8 E
2
PROM, fabricated with
Xicor’s proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28HC64 is a 5V only device. The
X28HC64 features the JEDEC approved pinout for byte-
wide memories, compatible with industry standard RAMs.
The X28HC64 supports a 64-byte page write operation,
effectively providing a 32
μ
s/byte write cycle and en-
abling the entire memory to be typically written in 0.25
seconds. The X28HC64 also features
DATA
Polling and
Toggle Bit Polling, two methods providing early end of
write detection. In addition, the X28HC64 includes a
user-optional software data protection mode that further
enhances Xicor’s hardware write protect capability.
Xicor E
2
PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
PGA
X28HC64
11
I/O0
10
A0
14
VSS
9
A1
8
A2
7
A3
6
A4
5
A5
2
A12
28
VCC
12
I/O1
13
I/O2
15
I/O3
4
A6
3
A7
1
NC
16
I/O4
20
CE
22
OE
24
A9
17
I/O5
27
WE
19
I/O7
21
A10
23
A11
25
A8
18
I/O6
26
NC
BOTTOM VIEW
3857 FHD F04
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