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參數(shù)資料
| 型號(hào)： | X25330V14-2.5 |
| 英文描述： | 5MHz SPI Serial E 2 PROM with Block Lock TM Protection |
| 中文描述： | 5MHz的SPI串行e的2座門鎖TM保護(hù)胎膜早破 |
| 文件頁(yè)數(shù)： | 3/14頁(yè) |
| 文件大?。?/td> | 74K |
| 代理商： | X25330V14-2.5 |
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X25330
3
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication,
HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
PRINCIPLES OF OPERATION
The X25330 is a 4K x 8 E
directly with the synchronous serial peripheral inter-
face (SPI) of many popular microcontroller families.
2
PROM designed to interface
The X25330 contains an 8-bit instruction register. It is
accessed via the SI input, with data being clocked in on
the rising SCK. CS must be LOW and the HOLD and
WP inputs must be HIGH during the entire operation.
Table 1 contains a list of the instructions and their
opcodes. All instructions, addresses and data are
transferred MSB first.
Data input is sampled on the first rising edge of SCK
after CS goes LOW. SCK is static, allowing the user to
stop the clock and then resume operations. If the clock
line is shared with other peripheral devices on the SPI
bus, the user can assert the
X25330 into a “PAUSE” condition. After releasing
HOLD, the X25330 will resume operation from the
point when HOLD was first asserted.
HOLD input to place the
Write Enable Latch
The X25330 contains a “write enable” latch. This latch
must be SET before a write operation will be
completed internally. The WREN instruction will set the
latch and the WRDI instruction will reset the latch. This
latch is automatically reset upon a power-up condition
and after the completion of a byte, page, or status
register write cycle.
Status Register
The RDSR instruction provides access to the status
register. The status register may be read at any time,
even during a write cycle. The status register is
formatted as follows:
7037 FRM T02
WPEN, BL0 and BL1 are set by the WRSR instruction.
WEL and WIP are read-only and automatically set by
other operations.
The Write-In-Process (WIP) bit indicates whether the
X25330 is busy with a write operation. When set to a
“1”, a write is in progress, when set to a “0”, no write is
in progress. During a write, all other bits are set to “1”.
The Write Enable Latch (WEL) bit indicates the status
of the “write enable” latch. When set to a “1”, the latch
is set, when set to a “0”, the latch is reset.
The Block Lock (BL0 and BL1) bits are nonvolatile and
allow the user to select one of four levels of protection.
The X25330 is divided into four 8K bit segments. One,
two, or all four of the segments may be protected. That
is, the user may read the segments but will be unable
to alter (write) data within the selected segments. The
partitioning is controlled as illustrated below.
7037 FRM T03
7
6
X
5
X
4
X
3
2
1
0
WPEN
BL1
BL0
WEL
WIP
Status Register Bits
BL1
0
0
1
1
Array Addresses
Protected
BL0
0
1
0
1
None
$0C00–$0FFF
$0800–$0FFF
$0000–$0FFF
Table 1. Instruction Set
7037 FRM T04
*Instructions are shown MSB in leftmost position. Instructions are transferred MSB first.
Instruction Name
WREN
WRDI
RDSR
WRSR
READ
WRITE
Instruction Format*
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
Operation
Set the Write Enable Latch (Enable Write Operations)
Reset the Write Enable Latch (Disable Write Operations)
Read Status Register
Write Status Register
Read Data from Memory Array beginning at selected address
Write Data to Memory Array beginning at Selected Address (1 to 32
Bytes)
相關(guān)PDF資料 |
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| X25383S8-2.7 | SPI Serial EEPROM with Supervisory Features |
| X25383S8I | SPI Serial EEPROM with Supervisory Features |
| X25383S8I-1.8 | SPI Serial EEPROM with Supervisory Features |
| X25383S8I-2.7 | SPI Serial EEPROM with Supervisory Features |
| X25383V8 | SPI Serial EEPROM with Supervisory Features |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X25330V14G | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:5MHz SPI Serial E2 PROM with Block Lock Protection |
| X25330V14G-2.5 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:5MHz SPI Serial E2 PROM with Block Lock Protection |
| X25330V14I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5MHz SPI Serial E 2 PROM with Block Lock TM Protection |
| X25330V14I-2.5 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5MHz SPI Serial E 2 PROM with Block Lock TM Protection |
| X25330V14IG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:5MHz SPI Serial E2 PROM with Block Lock Protection |
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