參數(shù)資料
型號: X24645VI
英文描述: Voltage Regulator IC; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes
中文描述: 先進(jìn)的2線串行e的2座門鎖TM保護(hù)胎膜早破
文件頁數(shù): 4/18頁
文件大?。?/td> 84K
代理商: X24645VI
X24645
4
Figure 3. Acknowledge Response From Receiver
Stop Condition
All communications must be terminated by a stop
condition, which is a LOW to HIGH transition of SDA
when SCL is HIGH. The stop condition is also used to
place the device into the standby power mode after a
read sequence. A stop condition can only be issued
after the transmitting device has released the bus.
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device,
either master or slave, will release the bus after trans-
mitting eight bits. During the ninth clock cycle the
receiver will pull the SDA line LOW to acknowledge
that it received the eight bits of data. Refer to Figure 3.
The X24645 will respond with an acknowledge after
recognition of a start condition and its slave address. If
both the device and a write operation have been
selected, the X24645 will respond with an acknowl-
edge after the receipt of each subsequent 8-bit word.
In the read mode the X24645 will transmit eight bits of
data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no
stop condition is generated by the master, the X24645
will continue to transmit data. If an acknowledge is not
detected, the X24645 will terminate further data trans-
missions. The master must then issue a stop condition
to return the X24645 to the standby power mode and
place the device into a known state.
2783 ILL F06
SCL FROM
MASTER
DATA OUTPUT
FROM
TRANSMITTER
1
8
9
DATA
OUTPUT
FROM
RECEIVER
START
ACKNOWLEDGE
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